18438636. SEMICONDUCTOR MEMORY DEVICE simplified abstract (Kioxia Corporation)
Contents
SEMICONDUCTOR MEMORY DEVICE
Organization Name
Inventor(s)
SEMICONDUCTOR MEMORY DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18438636 titled 'SEMICONDUCTOR MEMORY DEVICE
According to one embodiment, a semiconductor memory device includes a first string with a first selection transistor, a first memory cell, and a second selection transistor in series, a second string with a third selection transistor, a second memory cell, and a fourth selection transistor in series, along with various gate lines and bit lines. During a read operation of the first memory cell, specific voltages are applied to the word line, bit lines, and selection gate lines.
- Simplified Explanation:
- The semiconductor memory device has two strings of memory cells connected in series. - Different voltages are applied to specific lines during a read operation to access the memory cells.
- Key Features and Innovation:
- Memory cells arranged in strings with selection transistors for efficient data access. - Specific voltage application to different lines for accurate read operations.
- Potential Applications:
- Data storage in various electronic devices. - Memory-intensive applications like artificial intelligence and big data processing.
- Problems Solved:
- Efficient memory access in semiconductor devices. - Accurate data retrieval during read operations.
- Benefits:
- Faster data access speeds. - Improved reliability in memory operations.
- Commercial Applications:
- Potential use in smartphones, computers, and servers for data storage and processing.
- Questions about Semiconductor Memory Devices:
1. How does the specific voltage application enhance memory access speed? 2. What are the potential challenges in implementing this technology in real-world applications?
- Frequently Updated Research:
- Stay updated on advancements in semiconductor memory technology for improved performance and reliability.
Original Abstract Submitted
According to one embodiment, a semiconductor memory device includes, a first string in which a first selection transistor, a first memory cell, and a second selection transistor are coupled in series, a second string in which a third selection transistor, a second memory cell, and a fourth selection transistor are coupled in series, a word line, a first selection gate line, a second selection gate line, a third selection gate line, a fourth selection gate line, a first bit line, and a second bit line. In a read operation of the first memory cell, when a voltage of the word line is raised to a first voltage, a second voltage is applied to the first bit line and a third voltage higher than the second voltage is applied to the second bit line.
