18435822. APPARATUSES INCLUDING REDISTRIBUTION LAYERS AND EMBEDDED INTERCONNECT STRUCTURES simplified abstract (Micron Technology, Inc.)
Contents
- 1 APPARATUSES INCLUDING REDISTRIBUTION LAYERS AND EMBEDDED INTERCONNECT STRUCTURES
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 APPARATUSES INCLUDING REDISTRIBUTION LAYERS AND EMBEDDED INTERCONNECT STRUCTURES - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Unanswered Questions
- 1.11 Original Abstract Submitted
APPARATUSES INCLUDING REDISTRIBUTION LAYERS AND EMBEDDED INTERCONNECT STRUCTURES
Organization Name
Inventor(s)
Shing-Yih Shih of New Taipei City (TW)
APPARATUSES INCLUDING REDISTRIBUTION LAYERS AND EMBEDDED INTERCONNECT STRUCTURES - A simplified explanation of the abstract
This abstract first appeared for US patent application 18435822 titled 'APPARATUSES INCLUDING REDISTRIBUTION LAYERS AND EMBEDDED INTERCONNECT STRUCTURES
Simplified Explanation
The semiconductor package described in the patent application includes a resin molded package substrate with metal vias, front-side RDL structure, back-side RDL structure, and a bridge TSV interconnect component embedded in the resin molded core. The bridge TSV interconnect component consists of a silicon substrate portion, an RDL structure on the silicon substrate portion, and TSVs in the silicon substrate portion. Additionally, a first semiconductor die and a second semiconductor die are mounted on the front-side RDL structure, and they are coplanar.
- Resin molded package substrate with metal vias
- Bridge TSV interconnect component embedded in the resin molded core
- First and second semiconductor dies mounted on the front-side RDL structure
- Coplanar arrangement of the semiconductor dies
Potential Applications
This technology could be applied in:
- High-performance computing
- Data centers
- Telecommunications
Problems Solved
- Improved signal transmission
- Enhanced thermal management
- Increased integration density
Benefits
- Higher reliability
- Better performance
- Cost-effective manufacturing process
Potential Commercial Applications
Optimized for:
- 5G infrastructure
- Artificial intelligence applications
- Automotive electronics
Possible Prior Art
Prior art may include:
- Traditional semiconductor packaging methods
- Existing TSV interconnect technologies
Unanswered Questions
How does this technology compare to existing TSV interconnect solutions in terms of performance and cost?
The article does not provide a direct comparison with existing TSV interconnect solutions.
What are the specific dimensions and materials used in the resin molded package substrate?
The article does not detail the specific dimensions and materials used in the resin molded package substrate.
Original Abstract Submitted
A semiconductor package includes a resin molded package substrate comprising a resin molded core, a plurality of metal vias in the resin molded core, a front-side RDL structure, and a back-side RDL structure. A bridge TSV interconnect component is embedded in the resin molded core. The bridge TSV interconnect component has a silicon substrate portion, an RDL structure integrally constructed on the silicon substrate portion, and TSVs in the silicon substrate portion. A first semiconductor die and a second semiconductor die are mounted on the front-side RDL structure. The first semiconductor die and the second semiconductor die are coplanar.
