18434848. READING METHOD AND READING CIRCUIT OF FRAM simplified abstract (ZHEJIANG UNIVERSITY)
Contents
- 1 READING METHOD AND READING CIRCUIT OF FRAM
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 READING METHOD AND READING CIRCUIT OF FRAM - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Unanswered Questions
- 1.11 Original Abstract Submitted
READING METHOD AND READING CIRCUIT OF FRAM
Organization Name
Inventor(s)
READING METHOD AND READING CIRCUIT OF FRAM - A simplified explanation of the abstract
This abstract first appeared for US patent application 18434848 titled 'READING METHOD AND READING CIRCUIT OF FRAM
Simplified Explanation
The present application discloses a reading method and a reading circuit of FRAM. The method comprises: converting changing rates of voltage signals on bit lines of a memory cell and a reference cell in a FRAM array to be consistent with magnitudes of corresponding voltages by respective differential circuits, inputting the voltage signals into a sense amplifier, and reading a voltage difference by the sense amplifier. A reading circuit using this method comprises two differential circuit modules and one sense amplifier; the differential circuit module is used to differentiate the voltage signals on the bit lines with respect to time to obtain the change rates of the voltage signals on the bit lines with respect to time; the sense amplifier is used to amplify the signal difference processed by the differential circuit modules and convert the information stored in a memory cell into “0” and “1”.
- FRAM reading method and circuit:
- Converts changing rates of voltage signals on bit lines to be consistent with magnitudes of corresponding voltages - Utilizes differential circuits and a sense amplifier for reading voltage differences - Differential circuit modules differentiate voltage signals on bit lines with respect to time - Sense amplifier amplifies signal difference and converts stored information into binary form
Potential Applications
The technology can be applied in: - Non-volatile memory systems - Embedded systems - IoT devices
Problems Solved
- Efficient reading of data in FRAM arrays - Improved accuracy in voltage signal conversion - Enhanced performance of memory cells
Benefits
- Faster data retrieval - Higher data accuracy - Increased memory cell efficiency
Potential Commercial Applications
"FRAM Reading Method and Circuit for Enhanced Memory Performance"
Possible Prior Art
No prior art known at this time.
Unanswered Questions
How does this technology compare to traditional memory reading methods?
This article does not provide a direct comparison to traditional memory reading methods.
Are there any limitations to the reading speed of this technology?
The article does not address any potential limitations to the reading speed of this technology.
Original Abstract Submitted
The present application discloses a reading method and a reading circuit of FRAM. The method comprises: converting changing rates of voltage signals on bit lines of a memory cell and a reference cell in a FRAM array to be consistent with magnitudes of corresponding voltages by respective differential circuits, inputting the voltage signals into a sense amplifier, and reading a voltage difference by the sense amplifier. A reading circuit using this method comprises two differential circuit modules and one sense amplifier; the differential circuit module is used to differentiate the voltage signals on the bit lines with respect to time to obtain the change rates of the voltage signals on the bit lines with respect to time; the sense amplifier is used to amplify the signal difference processed by the differential circuit modules and convert the information stored in a memory cell into “0” and “1”.
