18433021. NOISY NEIGHBOR DETECTION simplified abstract (Intel Corporation)
Contents
- 1 NOISY NEIGHBOR DETECTION
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 NOISY NEIGHBOR DETECTION - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Unanswered Questions
- 1.11 Original Abstract Submitted
NOISY NEIGHBOR DETECTION
Organization Name
Inventor(s)
Adrian Stanciu of Craiova (RO)
NOISY NEIGHBOR DETECTION - A simplified explanation of the abstract
This abstract first appeared for US patent application 18433021 titled 'NOISY NEIGHBOR DETECTION
Simplified Explanation
The abstract of the patent application describes a processor that can aggregate cache misses and cache occupancy in a shared cache used by multiple input/output sources. The processor can then identify which input/output source is impacting the cache based on this aggregation.
- The processor aggregates cache misses and cache occupancy in a shared cache used by multiple input/output sources.
- Based on the aggregation, the processor identifies the input/output source that is impacting the cache the most.
Potential Applications
The technology described in this patent application could be applied in various fields such as:
- Data centers
- Cloud computing
- High-performance computing
Problems Solved
This technology helps in:
- Improving cache performance
- Optimizing resource allocation
- Enhancing overall system efficiency
Benefits
The benefits of this technology include:
- Reduced cache misses
- Better utilization of cache resources
- Improved system performance
Potential Commercial Applications
The potential commercial applications of this technology could be in:
- Server hardware
- Networking equipment
- Storage devices
Possible Prior Art
One possible prior art for this technology could be:
- Cache management algorithms used in computer systems
Unanswered Questions
How does the processor determine which input/output source is impacting the cache the most?
The abstract does not provide details on the specific method used by the processor to identify the most impactful input/output source.
The abstract does not elaborate on the exact techniques or algorithms employed by the processor for aggregating cache data.
Original Abstract Submitted
A processor may aggregate cache misses in a cache, the cache shared by a plurality of input/output (I/O) sources. The processor may aggregate cache occupancy in the cache by the plurality of VO sources. The processor may and identify, based on the aggregating, a first I/O source of the plurality of I/O sources as impacting the cache.
