18429471. METHOD OF FABRICATING SEMICONDUCTOR PACKAGE simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

METHOD OF FABRICATING SEMICONDUCTOR PACKAGE

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Hao-Yi Tsai of Hsinchu City (TW)

Cheng-Chieh Hsieh of Tainan (TW)

Tsung-Hsien Chiang of Hsinchu (TW)

Hui-Chun Chiang of Hsinchu (TW)

Tzu-Sung Huang of Tainan City (TW)

Ming-Hung Tseng of Miaoli County (TW)

Kris Lipu Chuang of Hsinchu City (TW)

Chung-Ming Weng of Taichung City (TW)

Tsung-Yuan Yu of Taipei City (TW)

Tzuan-Horng Liu of Taoyuan City (TW)

METHOD OF FABRICATING SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18429471 titled 'METHOD OF FABRICATING SEMICONDUCTOR PACKAGE

The semiconductor package described in the abstract includes two semiconductor dies, insulating encapsulations, a dielectric layer structure, a conductor structure, and a second insulating encapsulation.

• The first semiconductor die has a through substrate via (TSV) extending from one side to the other, with the second semiconductor die placed on one side.
• The first insulating encapsulation covers the first semiconductor die, with a terminal of the TSV being coplanar with its surface.
• A dielectric layer structure and a conductor structure are present, with the conductor structure contacting the TSV.
• The second insulating encapsulation contacts the second semiconductor die, the first insulating encapsulation, and the dielectric layer structure.

Potential Applications: - This semiconductor package can be used in various electronic devices such as smartphones, tablets, and computers. - It can also be utilized in automotive electronics, medical devices, and industrial equipment.

Problems Solved: - Provides a compact and efficient way to package multiple semiconductor dies in a single unit. - Ensures proper insulation and protection for the semiconductor components.

Benefits: - Improved performance and reliability of electronic devices. - Cost-effective packaging solution for semiconductor components.

Commercial Applications: Title: Advanced Semiconductor Packaging Technology for Electronic Devices This technology can be applied in the consumer electronics industry, semiconductor manufacturing, and other high-tech sectors. It offers a competitive edge in producing smaller, more powerful electronic devices.

Questions about Semiconductor Package Technology: 1. How does the coplanar terminal of the TSV enhance the performance of the semiconductor package?

  The coplanar terminal design ensures efficient signal transmission and reduces signal loss in the package.

2. What are the key advantages of using a dielectric layer structure in this semiconductor package?

  The dielectric layer structure provides insulation between components, reducing interference and improving overall reliability.

Original Abstract Submitted

A semiconductor package including a first semiconductor die, a second semiconductor die, a first insulating encapsulation, a dielectric layer structure, a conductor structure and a second insulating encapsulation is provided. The first semiconductor die includes a first semiconductor substrate and a through substrate via (TSV) extending from a first side to a second side of the semiconductor substrate. The second semiconductor die is disposed on the first side of the semiconductor substrate. The first insulating encapsulation on the second semiconductor die encapsulates the first semiconductor die. A terminal of the TSV is coplanar with a surface of the first insulating encapsulation. The dielectric layer structure covers the first semiconductor die and the first insulating encapsulation. The conductor structure extends through the dielectric layer structure and contacts with the through substrate via. The second insulating encapsulation contacts with the second semiconductor die, the first insulting encapsulation, and the dielectric layer structure.