18423583. NON-VOLATILE MEMORY DEVICE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
NON-VOLATILE MEMORY DEVICE
Organization Name
Inventor(s)
NON-VOLATILE MEMORY DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18423583 titled 'NON-VOLATILE MEMORY DEVICE
The abstract describes a non-volatile memory device with a first semiconductor layer and a second semiconductor layer arranged vertically. The first semiconductor layer contains memory cells and metal lines, including bit lines and a common source line tapping wire. The second semiconductor layer includes a page buffer circuit connected to the bit lines, with transistors and a guard ring.
- Memory device with vertical arrangement of semiconductor layers
- First layer has memory cells and metal lines for data storage
- Second layer includes page buffer circuit for data retrieval
- Page buffer circuit consists of transistors and guard ring for protection
Potential Applications: - Data storage in electronic devices - Memory modules for computers and servers - Embedded memory in smartphones and tablets
Problems Solved: - Efficient data storage and retrieval in a compact device - Enhanced performance and reliability of non-volatile memory
Benefits: - Faster access to stored data - Increased data security and integrity - Compact design for space-saving applications
Commercial Applications: Title: "Innovative Non-Volatile Memory Device for Enhanced Data Storage" This technology can be used in various electronic devices, such as smartphones, tablets, laptops, and servers, to improve data storage and retrieval capabilities. The market implications include increased demand for high-performance memory solutions in the tech industry.
Questions about Non-Volatile Memory Devices: 1. How does the vertical arrangement of semiconductor layers improve data storage efficiency? The vertical arrangement allows for more memory cells in a compact space, increasing storage capacity. 2. What role does the guard ring play in the page buffer circuit? The guard ring provides protection for the common source line tapping wire, ensuring data integrity and reliability.
Original Abstract Submitted
A non-volatile memory device includes a first semiconductor layer and a second semiconductor layer arranged in the vertical direction. A first semiconductor layer includes a plurality of memory cells, and a plurality of metal lines extending in a first direction, and including first bit lines, second bit lines, and a common source line tapping wire between the first bit lines and the second bit lines. A second semiconductor layer includes a page buffer circuit connected to the first bit lines and the second bit lines, and the page buffer circuit includes first transistors arranged below the first bit lines and electrically connected to the first bit lines, second transistors arranged below the second bit lines and electrically connected to the second bit lines, and a first guard ring arranged below and overlapped the common source line tapping wire in the vertical direction and extending in the first direction.
