18418964. STACKED-CHIP PACKAGES simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
STACKED-CHIP PACKAGES
Organization Name
Inventor(s)
STACKED-CHIP PACKAGES - A simplified explanation of the abstract
This abstract first appeared for US patent application 18418964 titled 'STACKED-CHIP PACKAGES
The abstract of the patent application describes a stacked-chip package consisting of a first chip and a second chip stacked on top of the first chip. The first chip includes a first cell array region, a first core circuit region with a first core terminal, and a first peripheral circuit region with multiple first peripheral circuit terminals. The second chip includes a second cell array region on top of the first cell array region, a second core circuit region on top of the first core circuit region with a second core terminal, and a through via on the first peripheral circuit region connected to at least one first peripheral circuit terminal.
- Stacked-chip package with first and second chips
- First chip has cell array, core circuit, and peripheral circuit regions
- Second chip placed on top of first chip with corresponding regions
- Through via on first chip connects to first peripheral circuit terminal
- Integration of multiple circuit regions in a compact package
Potential Applications: - Memory modules - Microprocessors - Integrated circuits
Problems Solved: - Space-saving design - Enhanced circuit integration - Improved signal transmission
Benefits: - Increased performance - Reduced footprint - Enhanced functionality
Commercial Applications: Title: "Innovative Stacked-Chip Package for Advanced Electronics" This technology can be used in various electronic devices such as smartphones, tablets, and computers, where space-saving and high performance are crucial. The market implications include improved product design, increased efficiency, and potential cost savings for manufacturers.
Questions about Stacked-Chip Package: 1. How does the through via on the first chip improve circuit connectivity? The through via on the first chip allows for better signal transmission between the first and second chips, enhancing overall circuit performance.
2. What are the key advantages of using a stacked-chip package in electronic devices? The main advantages include compact design, increased functionality, and improved efficiency in signal processing.
Original Abstract Submitted
A stacked-chip package of the inventive concepts includes a first chip and a second chip stacked on the first chip. The first chip may include a first cell array region, a first core circuit region including a first core terminal, and a first peripheral circuit region including a plurality of first peripheral circuit terminals. The second chip may include a second cell array region on the first cell array region, a second core circuit region on the first core circuit region and including a second core terminal, and a through via on the first peripheral circuit region and connected to at least one first peripheral circuit terminal of the plurality of first peripheral circuit terminals.
