18403022. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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SEMICONDUCTOR PACKAGE

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Joonho Jun of Suwon-si (KR)

Kyomin Sohn of Suwon-si (KR)

Duksung Kim of Suwon-si (KR)

Byoungkon Jo of Suwon-si (KR)

Jangseok Choi of Suwon-si (KR)

SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18403022 titled 'SEMICONDUCTOR PACKAGE

The semiconductor package described in the abstract includes a package substrate and multiple memory dies stacked on the substrate in a specific arrangement.

  • The first and second memory dies are attached without a bump, while the second and third memory dies are connected using multiple bumps.
  • The memory dies are stacked in a sequential manner in a direction perpendicular to the package substrate's upper surface.

Potential Applications: This technology can be used in various electronic devices requiring memory storage, such as smartphones, tablets, and computers.

Problems Solved: This innovation addresses the need for efficient memory stacking in semiconductor packages without the use of excessive bumps.

Benefits: The semiconductor package design allows for a compact and efficient memory storage solution, improving overall device performance.

Commercial Applications: This technology could be valuable for semiconductor manufacturers looking to enhance memory storage capabilities in their products, potentially leading to more advanced and compact electronic devices.

Questions about Semiconductor Package Design: 1. How does the absence of bumps between certain memory dies affect the overall performance of the semiconductor package? 2. What are the potential challenges in implementing this specific memory stacking technique in mass production?


Original Abstract Submitted

A semiconductor package according to an example embodiment of the present disclosure includes: a package substrate; and first to third memory dies disposed on the package substrate and sequentially stacked in a first direction, perpendicular to an upper surface of the package substrate, and the first memory die and the second memory die are attached to each other without a bump, and the second memory die and the third memory die are attached to each other by a plurality of bumps.