18378540. MEMORY DEVICE THAT PERFORMS ERASE OPERATION TO PRESERVE DATA RELIABILITY simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
MEMORY DEVICE THAT PERFORMS ERASE OPERATION TO PRESERVE DATA RELIABILITY
Organization Name
Inventor(s)
Youngdeok Seo of Suwon-si (KR)
MEMORY DEVICE THAT PERFORMS ERASE OPERATION TO PRESERVE DATA RELIABILITY - A simplified explanation of the abstract
This abstract first appeared for US patent application 18378540 titled 'MEMORY DEVICE THAT PERFORMS ERASE OPERATION TO PRESERVE DATA RELIABILITY
Simplified Explanation
The patent application describes a memory device that consists of a memory block and a control circuit. The memory block is composed of two sub-blocks that are vertically stacked and connected to a common source line and multiple bit lines. The control circuit is designed to select either the common source line or the bit lines as a transmission path for an erase voltage, based on the positions of the sub-blocks. It can perform erase operations on the sub-blocks in units of sub-blocks.
- The memory device includes a memory block and a control circuit.
- The memory block is made up of two sub-blocks that are vertically stacked.
- The sub-blocks are connected to a common source line and multiple bit lines.
- The control circuit can select either the common source line or the bit lines as a transmission path for an erase voltage.
- The selection is based on the positions of the sub-blocks.
- The control circuit can perform erase operations on the sub-blocks in units of sub-blocks.
Potential Applications:
- Memory devices in electronic devices such as smartphones, tablets, and computers.
- Solid-state drives (SSDs) for data storage.
- Embedded memory in microcontrollers and other integrated circuits.
Problems Solved:
- Efficient erase operations on memory blocks.
- Improved control over transmission paths for erase voltages.
- Enhanced memory block architecture for better performance and reliability.
Benefits:
- Faster and more efficient erase operations.
- Increased control and flexibility in selecting transmission paths.
- Improved performance and reliability of memory devices.
- Higher storage density in memory blocks.
Original Abstract Submitted
A memory device may include a memory block and a control circuit. The memory block may include a first sub-block and a second sub-block that are connected between a common source line and a plurality of bit lines and may be vertically stacked. The control circuit may be configured to select any one of the common source line and the plurality of bit lines as a transmission path of an erase voltage based on positions of the first sub-block and the second sub-block, and perform erase operations on the first sub-block and the second sub-block in units of sub-blocks.
