18372444. SYSTEM AND METHOD FOR DETERMINING OVERLAY MEASUREMENT OF A SCANNING TARGET simplified abstract (KLA Corporation)

SYSTEM AND METHOD FOR DETERMINING OVERLAY MEASUREMENT OF A SCANNING TARGET

Organization Name

KLA Corporation

Inventor(s)

Itay Gdor of Tel-Aviv (IL)

Yonatan Vaknin of Yoqneam Llit (IL)

Nireekshan K. Reddy of Tel Aviv (IL)

Alon Alexander Volfman of Tel-Aviv (IL)

Iftach Galon of Tel-Aviv (IL)

Jordan Pio of Milpitas CA (US)

Yuval Lubashevsky of Haifa (IL)

Nickolai Isakovitch of Tel-Aviv (IL)

Andrew V. Hill of Sunriver OR (US)

Oren Lahav of Tel-Aviv (IL)

Daria Negri of Nesher (IL)

Vladimir Levinski of Migdal HaEmek (IL)

SYSTEM AND METHOD FOR DETERMINING OVERLAY MEASUREMENT OF A SCANNING TARGET - A simplified explanation of the abstract

This abstract first appeared for US patent application 18372444 titled 'SYSTEM AND METHOD FOR DETERMINING OVERLAY MEASUREMENT OF A SCANNING TARGET

Simplified Explanation: The patent application describes a method for analyzing interference signals from photodetectors associated with different exposure structures to determine overlay errors in a sample during metrology scanning.

Key Features and Innovation:

• Method involves receiving time-varying interference signals from photodetectors in cells with side-by-side gratings.
• The side-by-side grating consists of non-overlapping diffraction gratings periodic along the scan direction.
• Overlay errors between exposure structures are determined based on synchronized interference signals.

Potential Applications: This technology can be applied in semiconductor manufacturing for precise alignment and measurement of overlay errors in integrated circuits.

Problems Solved: This method addresses the challenge of accurately measuring overlay errors between different exposure structures in semiconductor manufacturing processes.

Benefits:

• Improved accuracy in measuring overlay errors.
• Enhanced quality control in semiconductor manufacturing.
• Increased efficiency in aligning exposure structures.

Commercial Applications: The technology can be utilized in the semiconductor industry for advanced metrology processes, ensuring high precision in the production of integrated circuits.

Prior Art: Prior research in the field of metrology and semiconductor manufacturing may provide insights into similar methods for analyzing overlay errors in samples.

Frequently Updated Research: Ongoing research in metrology techniques and semiconductor manufacturing may lead to further advancements in overlay error analysis methods.

Questions about Overlay Error Analysis: 1. How does the synchronization of interference signals improve the accuracy of overlay error measurement? 2. What are the potential challenges in implementing this method in high-volume semiconductor production?

Original Abstract Submitted

A method may include receiving time-varying interference signals from two or more photodetectors associated with a first exposure structure and a second exposure structure in one or more cells as an overlay target is scanned in accordance with a metrology recipe, where the first exposure structure and the second exposure structure form a side-by-side grating, where the side-by-side grating includes one or more diffraction gratings, where at least one diffraction grating is a non-overlapping side-by-side grating, where the first exposure structure is arranged adjacent to the second exposure structure, where the side-by-side grating is periodic along the scan direction. The method may further include determining an overlay error between one of the first exposure structure and the second exposure structure of the sample based on the time-varying interference signals, where the time-varying interference signals corresponding to the non-overlapping first exposure structure and second exposure structure are synchronized.