18369079. 3D-STACKED MEMORY WITH RECONFIGURABLE COMPUTE LOGIC simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

3D-STACKED MEMORY WITH RECONFIGURABLE COMPUTE LOGIC

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Mu-Tien Chang of San Jose CA (US)

Prasun Gera of Atlanta GA (US)

Dimin Niu of Sunnyvale CA (US)

Hongzhong Zheng of Sunnyvale CA (US)

3D-STACKED MEMORY WITH RECONFIGURABLE COMPUTE LOGIC - A simplified explanation of the abstract

This abstract first appeared for US patent application 18369079 titled '3D-STACKED MEMORY WITH RECONFIGURABLE COMPUTE LOGIC

Simplified Explanation

The abstract of the patent application describes a 3D-stacked memory device consisting of a base die with switches and arithmetic logic units (ALUs), multiple memory dies stacked on top of the base die, and an interface for signal transfer to control the base die.

• The base die contains switches that direct the flow of data and arithmetic logic units (ALUs) that perform data computations.
• Multiple memory dies are stacked on top of the base die, forming a 3D structure.
• An interface is provided to transfer signals that control the operations of the base die.

Potential Applications:

• High-performance computing: The 3D-stacked memory device can be used in supercomputers and data centers to enhance computational capabilities and memory bandwidth.
• Artificial intelligence: The device can support AI applications by providing efficient data processing and storage capabilities.
• Mobile devices: The compact and high-performance nature of the device makes it suitable for use in smartphones and tablets, improving their processing power and memory capacity.

Problems Solved:

• Limited memory bandwidth: The 3D-stacked memory device addresses the issue of limited memory bandwidth by stacking memory dies on top of the base die, allowing for faster data transfer and improved performance.
• Space constraints: By stacking multiple dies, the device overcomes space constraints and provides a higher memory capacity within a compact form factor.
• Energy efficiency: The integration of switches and ALUs in the base die enables efficient data flow and computation, resulting in improved energy efficiency compared to traditional memory architectures.

Benefits:

• Increased performance: The 3D-stacked memory device offers higher computational capabilities and memory bandwidth, leading to improved overall system performance.
• Enhanced memory capacity: By stacking multiple memory dies, the device provides a larger memory capacity, allowing for the storage of larger datasets and more complex computations.
• Space-saving design: The compact form factor of the device saves physical space, making it suitable for various applications where space is limited.
• Energy efficiency: The integration of switches and ALUs in the base die improves energy efficiency, reducing power consumption and heat generation.

Original Abstract Submitted

A 3D-stacked memory device including: a base die including a plurality of switches to direct data flow and a plurality of arithmetic logic units (ALUs) to compute data; a plurality of memory dies stacked on the base die; and an interface to transfer signals to control the base die.