18364127. MEMORY DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME simplified abstract (Samsung Electronics Co., Ltd.)

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MEMORY DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

AENEE Jang of SUWON-SI (KR)

SEUNGDUK Baek of SUWON-SI (KR)

MEMORY DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18364127 titled 'MEMORY DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME

The semiconductor package described in the patent application consists of a package substrate with a first pad, a first memory device containing stacked first and second semiconductor chips, and a first chip connecting member that links the first semiconductor chip to the package substrate.

Key Features and Innovation:

  • The first semiconductor chip includes a first cell structure, a first peripheral circuit structure, a first bonding pad, and a first input/output pad connected to the first pad of the package substrate.
  • The second semiconductor chip has a second cell structure and a second bonding pad linked to the first bonding pad.
  • A portion of the first peripheral circuit structure extends from the side of the second semiconductor chip without overlapping it.

Potential Applications: This technology could be utilized in various electronic devices requiring compact and efficient semiconductor packaging.

Problems Solved: This innovation addresses the challenge of optimizing space within semiconductor packages while maintaining effective electrical connections between chips and substrates.

Benefits:

  • Improved space utilization within semiconductor packages
  • Enhanced electrical connectivity between chips and substrates
  • Potential for increased efficiency and performance in electronic devices

Commercial Applications: This technology could have commercial applications in the semiconductor industry for the development of advanced electronic devices with optimized packaging solutions.

Prior Art: Readers interested in exploring prior art related to this technology may consider researching semiconductor packaging methods and innovations in the field.

Frequently Updated Research: Stay informed about the latest advancements in semiconductor packaging technologies to understand the evolving landscape of this industry.

Questions about Semiconductor Packaging: 1. How does this semiconductor packaging technology compare to traditional methods? 2. What potential challenges could arise in implementing this innovative packaging solution?


Original Abstract Submitted

A semiconductor package includes a package substrate including a first pad; a first memory device arranged on the package substrate and including first and second semiconductor chips stacked in a vertical direction; and a first chip connecting member electrically connecting the first semiconductor chip to the package substrate. The first semiconductor chip includes a first cell structure; a first peripheral circuit structure; a first bonding pad; and a first input/output pad electrically connected to the first pad of the package substrate through the first chip connection member. The second semiconductor chip includes a second cell structure; and a second bonding pad connected to the first bonding pad. A part of the first peripheral circuit structure protrudes from a sidewall of the second semiconductor chip so as not to overlap the second semiconductor chip.