18364026. MEMORY DEVICE AND ZQ CALIBRATION METHOD simplified abstract (Changxin Memory Technologies, Inc.)
Contents
MEMORY DEVICE AND ZQ CALIBRATION METHOD
Organization Name
Changxin Memory Technologies, Inc.
Inventor(s)
MEMORY DEVICE AND ZQ CALIBRATION METHOD - A simplified explanation of the abstract
This abstract first appeared for US patent application 18364026 titled 'MEMORY DEVICE AND ZQ CALIBRATION METHOD
Simplified Explanation
The present disclosure describes a memory device and a ZQ calibration method. The memory device consists of a master chip and multiple slave chips. The master and slave chips have first and second transmission terminals, with the first terminals connected to each other and the second terminals connected to each other. The master chip has a first signal receiver and an address transmitter, while the slave chip has a second signal receiver. The address transmitter sends an address signal, and after completing the calibration, the current slave chip sends a ZQ flag signal. The address transmitter then sends the next address signal.
- Memory device with master and slave chips
- First and second transmission terminals connect the chips
- Master chip has a first signal receiver and address transmitter
- Slave chip has a second signal receiver
- Address transmitter sends address signal
- Current slave chip sends ZQ flag signal after calibration
- Address transmitter sends next address signal
Potential applications of this technology:
- Memory devices in computers, smartphones, and other electronic devices
- Data storage and retrieval in various industries such as healthcare, finance, and telecommunications
Problems solved by this technology:
- Simplifies the ZQ calibration process in memory devices
- Improves the efficiency and accuracy of calibration
Benefits of this technology:
- Faster and more reliable memory calibration
- Enhanced performance and stability of memory devices
- Cost-effective solution for memory calibration
Original Abstract Submitted
The present disclosure provides a memory device and a ZQ calibration method. The memory device includes a master chip and a plurality of slave chips. The master chip and the slave chips are each provided with a first transmission terminal and a second transmission terminal, where the first transmission terminals are connected to each other, and the second transmission terminals are connected to each other; and a first signal receiver and an address transmitter are provided in the master chip, and a second signal receiver is provided in the slave chip, the address transmitter is configured to send an address signal; a current slave chip sends the ZQ flag signal after completing the calibration; and the address transmitter is configured to send a next address signal.
