18355450. THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME simplified abstract (Samsung Electronics Co., Ltd.)

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THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Jiwon Kim of Suwon-si (KR)

Jiyoung Kim of Suwon-si (KR)

Woosung Yang of Suwon-si (KR)

Dohyung Kim of Suwon-si (KR)

Sukkang Sung of Suwon-si (KR)

THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18355450 titled 'THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME

Simplified Explanation

The 3D semiconductor memory device described in the patent application includes a first substrate, a peripheral circuit structure, and a cell array structure. The cell array structure consists of a second substrate, a stack structure with interlayer dielectric layers and conductive patterns, vertical channel structures with vertical semiconductor patterns, and connection vias connected to the vertical semiconductor patterns.

  • First substrate with peripheral circuit structure
  • Cell array structure with second substrate, stack structure, vertical channel structures, and connection vias

Potential Applications

The technology described in the patent application could be applied in:

  • High-performance computing systems
  • Data storage devices

Problems Solved

This technology addresses the following issues:

  • Increasing demand for higher memory capacity
  • Need for faster data processing speeds

Benefits

The benefits of this technology include:

  • Improved memory density
  • Enhanced data processing capabilities

Potential Commercial Applications

The technology could be utilized in:

  • Servers and data centers
  • Consumer electronics devices

Possible Prior Art

One possible prior art for this technology could be:

  • 3D NAND memory structures

What are the specific materials used in the stack structure of the cell array?

The specific materials used in the stack structure are not mentioned in the abstract.

How does the vertical channel structure improve memory performance compared to traditional memory devices?

The abstract does not provide details on how the vertical channel structure improves memory performance.


Original Abstract Submitted

Disclosed are 3D semiconductor memory devices and electronic systems including the same. The 3D semiconductor memory device comprises a first substrate, a peripheral circuit structure on the first substrate, and a cell array structure on the peripheral circuit structure. The cell array structure includes a second substrate, a stack structure between the second substrate and the peripheral circuit structure and including interlayer dielectric layers and conductive patterns that are stacked alternately with the interlayer dielectric layers, vertical channel structures that include respective portions the stack structure and include vertical semiconductor patterns, respectively, and connection vias that include respective portions the second substrate and are connected to respective top surfaces of the vertical semiconductor patterns.