18351975. FAN-OUT SEMICONDUCTOR PACKAGE AND A METHOD FOR MANUFACTURING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
FAN-OUT SEMICONDUCTOR PACKAGE AND A METHOD FOR MANUFACTURING THE SAME
Organization Name
Inventor(s)
Myeongho Hong of Suwon-si (KR)
Hyunseok Choi of Suwon-si (KR)
FAN-OUT SEMICONDUCTOR PACKAGE AND A METHOD FOR MANUFACTURING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18351975 titled 'FAN-OUT SEMICONDUCTOR PACKAGE AND A METHOD FOR MANUFACTURING THE SAME
The present disclosure pertains to fan-out semiconductor packages and methods for their production. A fan-out semiconductor package consists of a substrate with a cavity, a semiconductor die inside the cavity with connection terminals at the bottom, a dummy die with through silicon vias in the fan-out region, a filler filling the empty space in the cavity, a lower redistribution layer on the bottom surfaces, and an upper redistribution layer on the top surfaces, both electrically connected to the connection terminals and through silicon vias.
- Substrate with cavity
- Semiconductor die with connection terminals
- Dummy die with through silicon vias
- Filler for empty space
- Lower and upper redistribution layers
Potential Applications: - Advanced electronics manufacturing - Semiconductor industry - Integrated circuit packaging
Problems Solved: - Enhanced connectivity in semiconductor packages - Improved performance and reliability of electronic devices
Benefits: - Higher efficiency in data transmission - Increased durability of semiconductor packages - Enhanced overall performance of electronic devices
Commercial Applications: Title: Advanced Semiconductor Packaging Solutions for Enhanced Connectivity This technology can be utilized in various industries such as telecommunications, consumer electronics, and automotive for improved connectivity and performance of electronic devices.
Prior Art: Researchers can explore existing patents related to fan-out semiconductor packages and semiconductor die technologies to understand the evolution of this field.
Frequently Updated Research: Researchers are constantly working on improving the design and manufacturing processes of fan-out semiconductor packages to meet the increasing demands for high-performance electronic devices.
Questions about Fan-Out Semiconductor Packages: 1. How does the design of fan-out semiconductor packages contribute to improved connectivity and performance? 2. What are the key differences between traditional semiconductor packaging methods and fan-out semiconductor packages in terms of efficiency and reliability?
Original Abstract Submitted
The present disclosure relates to fan-out semiconductor packages and a methods for manufacturing the same. A fan-out semiconductor package includes a substrate including a cavity, a semiconductor die within the cavity and including a plurality of connection terminals at a bottom surface thereof, a dummy die at a fan-out region within the cavity and including a plurality of through silicon vias (TSVs), a filler filling an empty space within the cavity, and a lower redistribution layer on bottom surfaces of the substrate, the semiconductor die, and the dummy die, and electrically connected to at least some of the plurality of connection terminals of the semiconductor die and the plurality of through silicon vias of the dummy die, and an upper redistribution layer on top surfaces of the substrate, the semiconductor die, and the dummy die, and electrically connected to the plurality of through silicon vias of the dummy die.
