18343145. PC-Based Instruction Group Permissions simplified abstract (Apple Inc.)
Contents
PC-Based Instruction Group Permissions
Organization Name
Inventor(s)
Jeffry E. Gonion of Campbell CA (US)
Bernard J. Semeria of Palo Alto CA (US)
PC-Based Instruction Group Permissions - A simplified explanation of the abstract
This abstract first appeared for US patent application 18343145 titled 'PC-Based Instruction Group Permissions
Simplified Explanation
Abstract: A permissions model is proposed for a processor that grants permissions based on the instruction group of an instruction. These permissions can be stored in tables and accessed using the program counter of the instruction. By comparing the instruction group with the permitted groups, it can be determined if the instruction has execution permission. Primary execution permissions determined by the program counter may also be used in addition to the instruction-group-based permissions.
- Permissions for a processor are based on the instruction group of an instruction.
- Permissions can be stored in tables and accessed using the program counter of the instruction.
- The instruction group is compared to the permitted groups to determine execution permission.
- Primary execution permissions determined by the program counter may also be used.
Potential Applications:
- This permissions model can be applied in various processors and instruction set architectures (ISAs).
- It can enhance security by controlling which instruction groups can be executed from specific program counter values.
- The model can be used in systems where different levels of execution privileges are required.
Problems Solved:
- The permissions model addresses the need for a more granular control over instruction execution in processors.
- It solves the problem of unauthorized instructions being executed by restricting permissions based on instruction groups.
- The model provides a flexible approach to managing execution privileges based on program counter values.
Benefits:
- Improved security by restricting execution permissions to authorized instruction groups.
- Enhanced control over instruction execution in processors.
- Flexibility in managing execution privileges based on program counter values.
Original Abstract Submitted
A permissions model for a processor in which permissions are based on the instruction group of an instruction. These permissions may be stored in permissions tables and indexed using the program counter of the instruction. The permissions may identify which of a plurality of instruction groups of an instruction set architecture (ISA) of a processor are permitted to execute from that program counter value. Accordingly, the instruction group of the instruction can be compared to the permitted instruction groups to determine if the instruction has execution permission. In some cases, the instruction-group-based permissions are secondary execution privileges; additional primary execution permissions that are determined using the program counter may also be used.
