18339827. PROCESSOR POWER MANAGEMENT simplified abstract (Intel Corporation)
Contents
PROCESSOR POWER MANAGEMENT
Organization Name
Inventor(s)
Altug Koker of El Dorado Hills CA (US)
Abhishek R. Appu of El Dorado Hills CA (US)
Kiran C. Veernapu of Bangalore (IN)
Balaji Vembu of Folsom CA (US)
Prasoonkumar Surti of Folsom CA (US)
Eric J. Hoekstra of Folsom CA (US)
Nikos Kaburlasos of Folsom CA (US)
Bhushan M. Borole of Rancho Cordova CA (US)
Travis T. Schluessler of Berthoud CO (US)
Ankur N. Shah of Folsom CA (US)
Jonathan Kennedy of Bristol (GB)
PROCESSOR POWER MANAGEMENT - A simplified explanation of the abstract
This abstract first appeared for US patent application 18339827 titled 'PROCESSOR POWER MANAGEMENT
Simplified Explanation
The abstract of this patent application describes methods and apparatus for avoiding cache lookup for cold cache. It involves collecting user information, generating a user profile, and setting a power profile for a processor in a data processing device using the user profile.
- The patent application relates to techniques for optimizing cache performance in data processing devices.
- The apparatus includes hardware logic to collect user information and generate a user profile.
- The user profile is used to set a power profile for the processor in the data processing device.
- By utilizing the user profile, the system can avoid cache lookup for cold cache, improving overall performance.
Potential Applications
This technology can be applied in various fields where data processing devices are used, including but not limited to:
- Mobile devices such as smartphones and tablets
- Personal computers and laptops
- Servers and data centers
Problems Solved
The technology addresses the following problems:
- Cold cache lookup can significantly impact the performance of data processing devices.
- Traditional cache lookup methods may not efficiently handle cold cache situations.
- Inefficient cache lookup can lead to slower response times and decreased user experience.
Benefits
The use of this technology offers several benefits:
- Improved cache performance by avoiding cold cache lookup.
- Enhanced user experience with faster response times and smoother operation.
- Optimized power usage by setting power profiles based on user profiles.
- Increased overall efficiency and performance of data processing devices.
Original Abstract Submitted
Methods and apparatus relating to techniques for avoiding cache lookup for cold cache. In an example, an apparatus comprises logic, at least partially comprising hardware logic, to collect user information for a user of a data processing device, generate a user profile for the user of the data processing device from the user information, and set a power profile a processor in the data processing device using the user profile. Other embodiments are also disclosed and claimed.
- Intel Corporation
- Altug Koker of El Dorado Hills CA (US)
- Abhishek R. Appu of El Dorado Hills CA (US)
- Kiran C. Veernapu of Bangalore (IN)
- Joydeep Ray of Folsom CA (US)
- Balaji Vembu of Folsom CA (US)
- Prasoonkumar Surti of Folsom CA (US)
- Kamal Sinha of Folsom CA (US)
- Eric J. Hoekstra of Folsom CA (US)
- Wenyin Fu of Folsom CA (US)
- Nikos Kaburlasos of Folsom CA (US)
- Bhushan M. Borole of Rancho Cordova CA (US)
- Travis T. Schluessler of Berthoud CO (US)
- Ankur N. Shah of Folsom CA (US)
- Jonathan Kennedy of Bristol (GB)
- G06F1/3209
- H04W52/02
- G06F1/324
- G06F1/3203
- G06F1/3212
- G06F1/3218
- G06F1/3231
- G06F3/01
- G06F11/07
- G06F11/30