18337605. SEMICONDUCTOR STORAGE DEVICE simplified abstract (Kioxia Corporation)

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SEMICONDUCTOR STORAGE DEVICE

Organization Name

Kioxia Corporation

Inventor(s)

Hiroshi Maejima of Setagaya Tokyo (JP)

Katsuaki Isobe of Yokohama Kanagawa (JP)

Keita Kimura of Fujisawa Kanagawa (JP)

SEMICONDUCTOR STORAGE DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18337605 titled 'SEMICONDUCTOR STORAGE DEVICE

Simplified Explanation

The semiconductor storage device described in the abstract includes a string of memory cells connected to a bit line and a source line. Data is written to adjacent memory cells sequentially from one end of the string to the other, and data is read by allowing a current to flow through the string in a specific direction.

  • Memory cells connected in a string
  • Data writing and reading operations performed sequentially

Potential Applications

The technology described in this patent application could be applied in various fields such as:

  • Solid-state drives
  • Embedded systems
  • Mobile devices

Problems Solved

This technology addresses several issues including:

  • Efficient data writing and reading processes
  • Improved data storage capabilities
  • Enhanced performance of semiconductor storage devices

Benefits

The benefits of this technology include:

  • Faster data transfer speeds
  • Higher data storage density
  • Lower power consumption

Potential Commercial Applications

The potential commercial applications of this technology could include:

  • Consumer electronics
  • Data centers
  • Automotive industry

Possible Prior Art

One possible prior art related to this technology is the use of NAND flash memory in storage devices. NAND flash memory also utilizes strings of memory cells for data storage and retrieval.

Unanswered Questions

How does this technology compare to existing memory cell configurations in terms of speed and efficiency?

The article does not provide a direct comparison between this technology and other memory cell configurations.

What are the potential limitations or drawbacks of using this specific memory cell configuration?

The article does not address any potential limitations or drawbacks associated with the described memory cell configuration.


Original Abstract Submitted

In one embodiment, a semiconductor storage device includes a string that has one end electrically connected to a bit line, and another end electrically connected to a source line, and includes a plurality of memory cells. An operation of writing data to each of a plurality of adjacent first memory cells among the plurality of memory cells is sequentially performed in a direction from a first memory cell on a side of the source line to a first memory cell on a side of the bit line. An operation of reading data from each of the plurality of adjacent first memory cells is performed to allow a current to flow through the string in a first direction from the source line to the bit line.