18334981. HIERARCHICAL MEMORY SYSTEM simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
HIERARCHICAL MEMORY SYSTEM
Organization Name
Inventor(s)
Heekwon Park of San Jose CA (US)
Changho Choi of San Jose CA (US)
Yang Seok Ki of Palo Alto CA (US)
HIERARCHICAL MEMORY SYSTEM - A simplified explanation of the abstract
This abstract first appeared for US patent application 18334981 titled 'HIERARCHICAL MEMORY SYSTEM
The abstract describes a hierarchical memory system and method that involves demoting data from a fast memory to a slow memory, promoting it to an intermediate memory zone, and eventually promoting it back to the fast memory through the intermediate memory zone.
- The method involves demoting a first page of data from a fast memory to a slow memory.
- The first page of data is then promoted from the slow memory to an intermediate memory zone.
- Finally, the first page of data is promoted from the intermediate memory zone to the fast memory.
- The intermediate memory zone includes a virtual zone within the slow memory.
Potential Applications: - This technology could be used in computer systems to optimize memory usage and access speeds. - It could be beneficial in improving overall system performance and efficiency.
Problems Solved: - Helps in managing memory hierarchy efficiently. - Optimizes data access speeds.
Benefits: - Improved memory management. - Enhanced system performance. - Efficient data access.
Commercial Applications: - This technology could be valuable for companies developing high-performance computing systems. - It could also be useful for cloud computing providers looking to optimize their infrastructure.
Questions about Hierarchical Memory System: 1. How does this technology compare to traditional memory management systems? 2. What are the potential drawbacks of implementing a hierarchical memory system?
Frequently Updated Research: - Stay updated on advancements in memory management systems and related technologies to enhance the efficiency and performance of computer systems.
Original Abstract Submitted
A hierarchical memory system and method. In some embodiments, the method includes: demoting a first page of data from a fast memory to a slow memory; promoting the first page of data from the slow memory to an intermediate memory zone; and promoting the first page of data from the intermediate memory zone to the fast memory, wherein the intermediate memory zone includes a virtual zone within the slow memory.
