18334744. SEMICONDUCTOR DEVICE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

From WikiPatents
Jump to navigation Jump to search

SEMICONDUCTOR DEVICE

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Joo-Han Kim of Suwon-si (KR)

Beom Kon Kim of Suwon-si (KR)

Woo Wan Wang of Suwon-si (KR)

Dong Hyun Lee of Suwon-si (KR)

Jung Su Han of Suwon-si (KR)

SEMICONDUCTOR DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18334744 titled 'SEMICONDUCTOR DEVICE

Simplified Explanation

The semiconductor device described in the patent application includes:

  • A first ADC that samples an input signal using a first clock signal, quantizes the signal with a first gain, and outputs multiple first output signals.
  • A second ADC that samples the input signal using a delayed second clock signal derived from the first clock signal, quantizes the signal with a second gain, and outputs multiple second output signals.
  • A gain mismatch estimator that calculates average absolute values of the first and second output signals, and computes gain correction values based on these averages.
  • A gain mismatch compensator that adjusts the first and second output signals using the gain correction values.

Potential applications of this technology:

  • Signal processing in communication systems
  • Audio processing in consumer electronics
  • Image processing in digital cameras

Problems solved by this technology:

  • Improving accuracy and consistency in signal quantization
  • Minimizing gain mismatches in ADCs
  • Enhancing overall performance of semiconductor devices

Benefits of this technology:

  • Higher quality output signals
  • Increased precision in signal processing
  • Improved reliability and stability in electronic devices


Original Abstract Submitted

A semiconductor device includes a first ADC configured to sample an input signal based on a first clock signal, quantize the input signal with a first gain, and output a plurality of first output signals, and a second ADC configured to sample the input signal based on a second clock signal obtained by delaying the first clock signal, quantize the input signal with a second gain, and output a plurality of second output signals. The device includes a gain mismatch estimator configured to calculate first and second values which are averages of absolute values of the first output signals and the second output signals, and calculate first and second gain correction values using the first and second values. A gain mismatch compensator is configured to output a plurality of corrected first output signals and corrected second output signals, according to the first and second gain correction values.