18331689. MEMORY DEVICE PERFORMING PROGRAM OPERATION AND METHOD OF OPERATING THE SAME simplified abstract (SK hynix Inc.)
Contents
- 1 MEMORY DEVICE PERFORMING PROGRAM OPERATION AND METHOD OF OPERATING THE SAME
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 MEMORY DEVICE PERFORMING PROGRAM OPERATION AND METHOD OF OPERATING THE SAME - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Key Features and Innovation
- 1.6 Potential Applications
- 1.7 Problems Solved
- 1.8 Benefits
- 1.9 Commercial Applications
- 1.10 Prior Art
- 1.11 Frequently Updated Research
- 1.12 Questions about Semiconductor Memory Device
- 1.13 Original Abstract Submitted
MEMORY DEVICE PERFORMING PROGRAM OPERATION AND METHOD OF OPERATING THE SAME
Organization Name
Inventor(s)
Hyun Seob Shin of Icheon-si Gyeonggi-do (KR)
Dong Hun Kwak of Icheon-si Gyeonggi-do (KR)
MEMORY DEVICE PERFORMING PROGRAM OPERATION AND METHOD OF OPERATING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18331689 titled 'MEMORY DEVICE PERFORMING PROGRAM OPERATION AND METHOD OF OPERATING THE SAME
Simplified Explanation
The patent application describes a semiconductor memory device that includes a memory block, peripheral circuit, and control logic. The peripheral circuit performs program operations on selected memory cells, while the control logic controls the application of voltages to different groups of memory cells based on their programming status.
- The memory device has a memory block with memory cells.
- The peripheral circuit performs program operations on selected memory cells.
- The control logic controls the application of voltages to different groups of memory cells based on their programming status.
Key Features and Innovation
- The memory device includes a memory block, peripheral circuit, and control logic.
- The peripheral circuit performs program operations on selected memory cells.
- The control logic controls the application of voltages to different groups of memory cells based on their programming status.
Potential Applications
This technology can be used in various semiconductor memory devices for efficient programming of memory cells.
Problems Solved
This technology addresses the need for precise control over the programming of memory cells in semiconductor memory devices.
Benefits
- Efficient programming of memory cells
- Precise control over programming operations
Commercial Applications
Potential Commercial Uses and Market Implications
This technology can be applied in the development of advanced semiconductor memory devices for various electronic applications.
Prior Art
There is no specific information provided on prior art related to this technology.
Frequently Updated Research
There is no specific information provided on frequently updated research relevant to this technology.
Questions about Semiconductor Memory Device
Question 1
How does the control logic determine the groups of memory cells for applying different voltages?
The control logic determines the groups of memory cells based on the programming status of the memory cells in previous program loops.
Question 2
What are the advantages of using a program inhibit voltage in the programming process?
The program inhibit voltage helps in efficiently controlling the programming of memory cells by inhibiting programming in specific target states.
Original Abstract Submitted
A semiconductor memory device includes a memory block, a peripheral circuit, and a control logic. The memory block includes memory cells. The peripheral circuit performs a program operation including program loops on selected memory cells. The control logic controls the peripheral circuit to apply a program inhibit voltage to bit lines connected to memory cells of a first group of target states, apply the program inhibit voltage to bit lines connected to memory cells on which programming is determined to be completed in a previous program loop, among memory cells of a second group of target states, and apply a program allowable voltage to bit lines connected to memory cells on which programming is determined to not be completed in the previous program loop, among the memory cells of the second group of target states. The first and second groups are determined by a number of current program loops.