18323646. SEMICONDUCTOR PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)

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SEMICONDUCTOR PACKAGE

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Jaesun Kim of Suwon-si (KR)

Sanghyun Lee of Suwon-si (KR)

Yeonho Jang of Suwon-si (KR)

Yunseok Choi of Suwon-si (KR)

SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18323646 titled 'SEMICONDUCTOR PACKAGE

Simplified Explanation

The semiconductor package described in the patent application includes a redistribution structure with stacked redistribution layers and insulating layers, a semiconductor chip connected to the redistribution layers, and bumps arranged on one surface of the redistribution structure. The redistribution layers have pads facing the bumps, each pad consisting of a first pad portion offset in one direction, a second pad portion offset in another direction, and a connection portion connecting the two pad portions, which includes protruding portions defining recessed regions adjacent to the pad portions.

  • Semiconductor package with redistribution structure
  • Redistribution layers and insulating layers stacked alternately
  • Semiconductor chip electrically connected to redistribution layers
  • Bumps electrically connected to redistribution layers and arranged on one surface
  • Pads on redistribution layers facing bumps
  • Pads with first and second pad portions offset in different directions
  • Connection portion between pad portions with protruding portions defining recessed regions

Potential Applications

The technology described in the patent application could be applied in various semiconductor packaging applications, such as in mobile devices, computers, automotive electronics, and industrial equipment.

Problems Solved

This technology solves the problem of efficiently connecting a semiconductor chip to external components through a redistribution structure, providing a reliable and compact solution for semiconductor packaging.

Benefits

The benefits of this technology include improved electrical connectivity, reduced footprint, enhanced reliability, and increased performance in semiconductor packaging applications.

Potential Commercial Applications

The technology described in the patent application could be commercially applied in the semiconductor industry for the development of advanced packaging solutions for various electronic devices.

Possible Prior Art

One possible prior art for this technology could be the use of redistribution structures in semiconductor packaging to improve electrical connections and reduce package size.


Original Abstract Submitted

A semiconductor package includes a redistribution structure in which redistribution layers and insulating layers are alternately stacked. A semiconductor chip is electrically connected to the redistribution layers, and bumps are electrically connected to the redistribution layers and arranged on one surface of the redistribution structure. The redistribution layers include pads arranged to face the bumps, and each of the pads includes a first pad portion offset from a center of each of the pads in a first direction, a second pad portion offset from the center of each of the pads in a second direction, and a connection portion connecting the first and second pad portions. The connection portion includes a protruding portion that defines a first recessed region recessed adjacent to the first pad portion and a second recessed region recessed adjacent to the second pad portion.