18319421. Serial Data Receiver with Even/Odd Mismatch Compensation simplified abstract (Apple Inc.)

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Serial Data Receiver with Even/Odd Mismatch Compensation

Organization Name

Apple Inc.

Inventor(s)

Ryan D. Bartling of Sunnyvale CA (US)

Jafar Savoj of Sunnyvale CA (US)

Serial Data Receiver with Even/Odd Mismatch Compensation - A simplified explanation of the abstract

This abstract first appeared for US patent application 18319421 titled 'Serial Data Receiver with Even/Odd Mismatch Compensation

Simplified Explanation

The abstract describes a patent application for a serial data receiver circuit in a computer system that includes a front-end circuit, a sample circuit with multiple analog-to-digital converter circuits, and a recovery circuit. The sample circuit samples a serial data stream at different times corresponding to even-numbered and odd-numbered symbols, while the recovery circuit uses different coefficients to process the samples of these symbols and recover the encoded data.

  • Front-end circuit included in the serial data receiver circuit
  • Sample circuit with multiple analog-to-digital converter circuits for sampling the serial data stream
  • Recovery circuit that uses different coefficients to process samples of even-numbered and odd-numbered symbols
  • Recovery circuit recovers the data symbols encoded in the serial data stream

Potential Applications

The technology could be applied in high-speed data communication systems, such as in networking equipment or telecommunications devices.

Problems Solved

This technology helps in accurately recovering data symbols from a serial data stream, even when sampled at different times, improving the overall reliability of data transmission.

Benefits

- Enhanced data recovery capabilities - Improved performance in processing serial data streams - Increased reliability in data communication systems

Potential Commercial Applications

"Enhancing Data Recovery in High-Speed Communication Systems"

Possible Prior Art

There may be prior art related to serial data receiver circuits in computer systems, but specific examples are not provided in the abstract.

Unanswered Questions

How does the recovery circuit determine the coefficients for processing the samples of even-numbered and odd-numbered symbols?

The abstract does not provide details on the specific method or algorithm used by the recovery circuit to determine the coefficients for processing the samples.

What is the impact of sampling the serial data stream at different times on the overall performance of the data receiver circuit?

The abstract does not discuss the potential implications or trade-offs of sampling the serial data stream at different times on the performance of the data receiver circuit.


Original Abstract Submitted

A serial data receiver circuit included in a computer system may include a front-end circuit, a sample circuit that includes multiple analog-to-digital converter circuits, and a recovery circuit. The sample circuit may sample a serial data stream at different times that correspond to even-numbered and odd-numbered symbols in the serial data stream. The recovery circuit may use different coefficients to process the respective samples of the even-numbered and odd-numbered symbols in order to recover the data symbols encoded in the serial data stream.