18318725. MEMORY DEVICE AND METHOD OF OPERATING THE SAME simplified abstract (SK hynix Inc.)
Contents
- 1 MEMORY DEVICE AND METHOD OF OPERATING THE SAME
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
MEMORY DEVICE AND METHOD OF OPERATING THE SAME
Organization Name
Inventor(s)
Chan Hui Jeong of Gyeonggi-do (KR)
Dong Hun Kwak of Gyeonggi-do (KR)
Se Chun Park of Gyeonggi-do (KR)
MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18318725 titled 'MEMORY DEVICE AND METHOD OF OPERATING THE SAME
Simplified Explanation
The present technology relates to an electronic device with a memory device that includes memory cells, a peripheral circuit, and control logic. The peripheral circuit performs fail bit detection on selected memory cells, and the control logic sets target parameters for a main operation based on the comparison result between the fail bit detection time and a reference time.
- Memory device with memory cells, peripheral circuit, and control logic
- Peripheral circuit performs fail bit detection on selected memory cells
- Control logic sets target parameters for main operation based on comparison result
- Main operation performed on selected memory cells based on target parameters
Potential Applications
The technology can be applied in various electronic devices such as smartphones, tablets, laptops, and other computing devices that require efficient memory management.
Problems Solved
1. Efficient fail bit detection in memory cells 2. Optimal control of main operations based on detection results
Benefits
1. Improved memory management 2. Enhanced reliability of electronic devices 3. Increased performance efficiency
Potential Commercial Applications
Optimized memory devices can be utilized in the manufacturing of consumer electronics, data storage devices, and industrial equipment to enhance overall performance and reliability.
Possible Prior Art
One possible prior art could be the use of error correction codes (ECC) in memory devices to detect and correct errors in memory cells. However, the present technology focuses on fail bit detection and setting target parameters for main operations based on the detection results.
What is the specific fail bit detection operation performed by the peripheral circuit?
The specific fail bit detection operation involves identifying memory cells that have failed and need to be excluded from main operations based on the comparison with a reference time.
How does the control logic determine the target parameters for the main operation?
The control logic determines the target parameters by analyzing the comparison result between the fail bit detection time and the reference time, ensuring optimal performance and reliability of the memory device.
Original Abstract Submitted
The present technology relates to an electronic device. According to the present technology, a memory device may include a plurality of memory cells, a peripheral circuit, and a control logic. The peripheral circuit may perform a fail bit detection operation on memory cells selected from among the plurality of memory cells. The control logic may control the peripheral circuit to set target parameters related to a main operation based on a comparison result between a fail bit detection time measured in the fail bit detection operation and a reference time, and perform the main operation on the selected memory cells based on the target parameters.
