18309149. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18309149 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The semiconductor package described in the patent application includes a substrate with a connection circuit, a redistribution structure, and a chip structure. The redistribution structure consists of a rear redistribution layer connected to the connection circuit, a first semiconductor chip between rear and front redistribution portions, and a front redistribution layer connected to the front redistribution portion. The first semiconductor chip is partially covered by a first molded portion, which has a first through-via passing through it to connect the front and rear redistribution layers. The chip structure includes a wiring portion with a wiring layer connected to the front redistribution layer, as well as second and third semiconductor chips on the wiring portion, each covered by a second molded portion.
- The semiconductor package includes a substrate, redistribution structure, and chip structure.
- The redistribution structure consists of rear and front redistribution layers connected to a connection circuit.
- A first semiconductor chip is located between the rear and front redistribution portions.
- The first semiconductor chip is partially covered by a first molded portion.
- A first through-via passes through the first molded portion to connect the front and rear redistribution layers.
- The chip structure includes a wiring portion with a wiring layer connected to the front redistribution layer.
- Second and third semiconductor chips are located on the wiring portion and covered by a second molded portion.
Potential applications of this technology:
- Semiconductor packaging for electronic devices such as smartphones, tablets, and computers.
- Integrated circuits for automotive electronics, medical devices, and industrial equipment.
Problems solved by this technology:
- Efficient electrical connection between different layers and chips within a semiconductor package.
- Protection of semiconductor chips from external elements and mechanical stress.
Benefits of this technology:
- Improved performance and reliability of electronic devices.
- Compact and space-saving design for semiconductor packages.
- Enhanced protection and durability for semiconductor chips.
Original Abstract Submitted
A semiconductor package may include a substrate including a connection circuit, a redistribution structure, and a chip structure on the redistribution structure. The redistribution structure may include a rear redistribution layer electrically connected to the connection circuit, a first semiconductor chip between rear and front redistribution portions and electrically connection to a front redistribution layer of the front redistribution portion, a first molded portion covering at least a portion of the first semiconductor chip, and a first through-via passing through the first molded portion and electrically connecting the front and the rear redistribution layers. The chip structure may include a wiring portion having a wiring layer electrically connected to the front redistribution layer, second and third semiconductor chips on the wiring portion and electrically connected to the wiring layer, and a second molded portion covering at least a portion of each of the second and third semiconductor chips.
