18302023. PACKAGE INCLUDING COMPOSITE INTERPOSER AND/OR COMPOSITE PACKAGING SUBSTRATE AND METHODS OF FORMING THE SAME simplified abstract (Taiwan Semiconductor Manufacturing Company Limited)

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PACKAGE INCLUDING COMPOSITE INTERPOSER AND/OR COMPOSITE PACKAGING SUBSTRATE AND METHODS OF FORMING THE SAME

Organization Name

Taiwan Semiconductor Manufacturing Company Limited

Inventor(s)

Chin-Hua Wang of New Tapei City (TW)

Tsung-Yen Lee of Hemei Township (TW)

Yu Chen Lee of Hsinchu City (TW)

Ping Tai Chen of Taipei City (TW)

Shin-Puu Jeng of Po-Shan Village (TW)

PACKAGE INCLUDING COMPOSITE INTERPOSER AND/OR COMPOSITE PACKAGING SUBSTRATE AND METHODS OF FORMING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18302023 titled 'PACKAGE INCLUDING COMPOSITE INTERPOSER AND/OR COMPOSITE PACKAGING SUBSTRATE AND METHODS OF FORMING THE SAME

The chip package structure described in the patent application consists of a composite interposer with in-interposer semiconductor chips, dielectric matrix, die-side redistribution structure, and substrate-side redistribution structure. Additionally, semiconductor dies are attached to the die-side redistribution structure using solder material portions.

  • Composite interposer with in-interposer semiconductor chips
  • Dielectric matrix surrounding the semiconductor chips
  • Die-side redistribution structure on one side of the dielectric matrix
  • Substrate-side redistribution structure on the other side of the dielectric matrix
  • Semiconductor dies attached to the die-side redistribution structure using solder material portions

Potential Applications: - Advanced semiconductor packaging technology - High-performance computing systems - Aerospace and defense electronics - Automotive electronics - Telecommunications infrastructure

Problems Solved: - Enhanced thermal management in semiconductor packaging - Improved electrical connectivity between components - Increased reliability and durability of chip packages

Benefits: - Higher performance and efficiency in electronic devices - Reduced size and weight of chip packages - Enhanced overall system reliability - Cost-effective manufacturing processes

Commercial Applications: Title: Advanced Semiconductor Packaging Technology for High-Performance Computing This technology can be utilized in the development of next-generation processors, graphics cards, and other high-performance computing systems. It can also be applied in aerospace, defense, automotive, and telecommunications industries to improve the performance and reliability of electronic systems.

Questions about the technology: 1. How does the composite interposer improve the performance of semiconductor chip packages? 2. What are the key advantages of using solder material portions to attach semiconductor dies to the redistribution structure?


Original Abstract Submitted

A chip package structure includes: a composite interposer including at least one in-interposer semiconductor chip including a respective semiconductor circuitry therein, a dielectric matrix laterally surrounding the at least one in-interposer semiconductor chip, a die-side redistribution structure located on a first side of the dielectric matrix, and a substrate-side redistribution structure located on a second side of the dielectric matrix; and at least one semiconductor die attached to the die-side redistribution structure through a respective array of solder material portions.

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