18236556. METAL SILICIDE IN INTEGRATION OF MEMORY ARRAY WITH PERIPHERY simplified abstract (Micron Technology, Inc.)
Contents
METAL SILICIDE IN INTEGRATION OF MEMORY ARRAY WITH PERIPHERY
Organization Name
Inventor(s)
Shivani Srivastava of Boise ID (US)
Raghunath Singanamalla of Boise ID (US)
Russell Allen Benson of Boise ID (US)
METAL SILICIDE IN INTEGRATION OF MEMORY ARRAY WITH PERIPHERY - A simplified explanation of the abstract
This abstract first appeared for US patent application 18236556 titled 'METAL SILICIDE IN INTEGRATION OF MEMORY ARRAY WITH PERIPHERY
Simplified Explanation
The patent application describes an apparatus with a memory device having metal digit lines coupled to digit line contacts for a memory array, integrated with metal contacts of transistors in a periphery to the memory array region, with metal silicide formed on the gates of the transistors. The metal silicide for each transistor is coupled to the metal contact for the transistor, and the material of the metal digit lines is used as the metal contact to the transistors in the periphery to the memory array region. The metal silicide is formed by conversion of polysilicon on the memory array region and the periphery to the memory array region in the integrated process flow.
- Metal digit lines coupled to digit line contacts for a memory array
- Metal contacts of transistors in a periphery to the memory array region
- Metal silicide formed on the gates of the transistors
- Metal silicide coupled to the metal contact for each transistor
- Material of the metal digit lines used as the metal contact to the transistors in the periphery
- Formation of metal silicide by conversion of polysilicon in the integrated process flow
- Potential Applications
- Memory devices - Integrated circuits - Semiconductor manufacturing
- Problems Solved
- Efficient integration of memory array with transistors in a periphery - Simplified process flow for forming metal silicide - Improved performance and reliability of memory devices
- Benefits
- Enhanced functionality of memory devices - Cost-effective manufacturing process - Increased speed and efficiency in semiconductor devices
Original Abstract Submitted
A variety of applications can include apparatus having a memory device with metal digit lines coupled to various digit line contacts for a memory array in an integrated process flow of the metal lines with metal contacts of transistors in a periphery to the memory array region, with a metal silicide formed on the gates of the transistors. The metal silicide for each transistor can be coupled to the metal contact for the transistor. In the integrated process flow, material of the metal digit lines can be used as the metal contact to the transistors in the periphery to the memory array region. The metal silicide can be formed by conversion of polysilicon formed on the memory array region and the periphery to the memory array region in the integrated process flow.
