18236544. SACRIFICIAL POLYSILICON IN INTEGRATION OF MEMORY ARRAY WITH PERIPHERY simplified abstract (Micron Technology, Inc.)
SACRIFICIAL POLYSILICON IN INTEGRATION OF MEMORY ARRAY WITH PERIPHERY
Organization Name
Inventor(s)
Shivani Srivastava of Boise ID (US)
Russell Allen Benson of Boise ID (US)
Raghunath Singanamalla of Boise ID (US)
SACRIFICIAL POLYSILICON IN INTEGRATION OF MEMORY ARRAY WITH PERIPHERY - A simplified explanation of the abstract
This abstract first appeared for US patent application 18236544 titled 'SACRIFICIAL POLYSILICON IN INTEGRATION OF MEMORY ARRAY WITH PERIPHERY
Simplified Explanation
- Apparatus includes a memory device with metal digit lines for various digit line contacts for a memory array. - Integrated process flow involves metal lines with metal contacts of transistors in a periphery to the memory array region. - Material of the metal digit lines can be used as the metal contacts to the transistors in the periphery. - Metal contact can contact a metal gate of a transistor in the periphery or contact a metal barrier region. - Metal barrier region is above and contacting the metal gate and is structured without including polysilicon. - Sacrificial polysilicon can be used to protect the gate of the transistor during processing in the memory array region.
Potential Applications
- Memory devices - Integrated circuits - Semiconductor manufacturing
Problems Solved
- Efficient integration of metal lines and contacts in memory devices - Simplified process flow in semiconductor manufacturing
Benefits
- Cost-effective manufacturing process - Improved performance and reliability of memory devices - Enhanced integration capabilities in semiconductor devices
Original Abstract Submitted
A variety of applications can include apparatus having a memory device with metal digit lines for various digit line contacts for a memory array in an integrated process flow of the metal lines with metal contacts of transistors in a periphery to the memory array region. In the integrated process flow, material of the metal digit lines can be used as the metal contacts to the transistors in the periphery to the memory array region. In various embodiments, a metal contact can contact a metal gate of a transistor in the periphery or contact a metal barrier region, where the metal barrier region is above and contacting the metal gate and is structured without including polysilicon. Sacrificial polysilicon can be used to protect the gate of the transistor during processing in the memory array region.
