18236087. ASYMMETRIC PASS THROUGH VOLTAGE FOR REDUCTION OF CELL-TO-CELL INTERFERENCE simplified abstract (Micron Technology, Inc.)
ASYMMETRIC PASS THROUGH VOLTAGE FOR REDUCTION OF CELL-TO-CELL INTERFERENCE
Organization Name
Inventor(s)
Augusto Benvenuti of Lallio (IT)
Giovanni Maria Paolucci of Milano (IT)
Alessio Urbani of Roma RM (IT)
Gianpietro Carnevale of Bottanuco (IT)
Aurelio Giancarlo Mauri of Meda (MB) (IT)
ASYMMETRIC PASS THROUGH VOLTAGE FOR REDUCTION OF CELL-TO-CELL INTERFERENCE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18236087 titled 'ASYMMETRIC PASS THROUGH VOLTAGE FOR REDUCTION OF CELL-TO-CELL INTERFERENCE
Simplified Explanation
- A memory access operation involves reading a set of memory cells on a specific wordline in a memory device. - During the memory access operation, a read voltage level is applied to the target wordline. - Additionally, a lower voltage level is applied to a wordline adjacent to the target wordline during the operation. - A higher voltage level is applied to another wordline adjacent to the target wordline, with the first voltage level being lower than the second voltage level.
Potential Applications
This technology could be used in: - Memory devices such as RAM and flash memory. - High-speed data processing applications. - Embedded systems and microcontrollers.
Problems Solved
- Reduced power consumption during memory access operations. - Improved reliability and performance of memory devices. - Minimized interference between adjacent wordlines.
Benefits
- Enhanced efficiency in memory access operations. - Increased speed and responsiveness of memory devices. - Extended lifespan of memory devices due to optimized voltage levels.
Original Abstract Submitted
A memory access operation is initiated to read a set of target memory cells of a target wordline of the memory device. During the memory access operation, a read voltage level is caused to be applied to the target wordline. During the memory access operation, a first pass through voltage level is caused to be applied to a first wordline adjacent to the target wordline. During the memory access operation, a second pass through voltage is caused to be applied to a second wordline adjacent to the target wordline, wherein the first pass through voltage level is less than the second pass through voltage level.
