18234046. MEMORY ARRAY STRUCTURES AND METHODS OF THEIR FABRICATION simplified abstract (Micron Technology, Inc.)
Contents
MEMORY ARRAY STRUCTURES AND METHODS OF THEIR FABRICATION
Organization Name
Inventor(s)
Albert Fayrushin of Boise ID (US)
Jae Young Ahn of Boise ID (US)
MEMORY ARRAY STRUCTURES AND METHODS OF THEIR FABRICATION - A simplified explanation of the abstract
This abstract first appeared for US patent application 18234046 titled 'MEMORY ARRAY STRUCTURES AND METHODS OF THEIR FABRICATION
Simplified Explanation
The abstract describes a memory array structure with multiple memory cells and charge-blocking structures, as well as dielectric materials between the control gates and charge-blocking structures.
- Memory array structure with multiple memory cells
- Charge-blocking structures in each memory cell
- Dielectric materials between control gates and charge-blocking structures
- Different dielectric materials used in different portions of the charge-blocking structures
---
- Potential Applications
- Non-volatile memory devices
- Solid-state drives
- Flash memory
- Problems Solved
- Improving memory cell performance
- Enhancing data retention in memory devices
- Increasing memory array density
- Benefits
- Higher storage capacity
- Faster data access
- Improved reliability and durability of memory devices
Original Abstract Submitted
Memory array structures, and methods of their formation, might include a first memory cell having a first control gate and an adjacent first portion of a charge-blocking structure, a second memory cell having a second control gate and an adjacent second portion of the charge-blocking structure, and a first dielectric material between the first control gate and the second control gate, and adjacent to a third portion of the charge-blocking structure that is between the first and second portions of the charge-blocking structure. The third portion of the charge-blocking structure might include a second dielectric material and a third dielectric material different than the second dielectric material, and the first portion of the charge-blocking structure and the second portion of the charge-blocking structure might each include the third dielectric material and a fourth dielectric material different than the second dielectric material. Apparatus might include such memory array structures.
