18233420. CORRECTIVE PROGRAM VERIFY OPERATION WITH IMPROVED READ WINDOW BUDGET RETENTION simplified abstract (Micron Technology, Inc.)

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CORRECTIVE PROGRAM VERIFY OPERATION WITH IMPROVED READ WINDOW BUDGET RETENTION

Organization Name

Micron Technology, Inc.

Inventor(s)

Ching-Huang Lu of Fremont CA (US)

Hong-Yan Chen of San Jose CA (US)

Yingda Dong of Los Altos CA (US)

CORRECTIVE PROGRAM VERIFY OPERATION WITH IMPROVED READ WINDOW BUDGET RETENTION - A simplified explanation of the abstract

This abstract first appeared for US patent application 18233420 titled 'CORRECTIVE PROGRAM VERIFY OPERATION WITH IMPROVED READ WINDOW BUDGET RETENTION

Simplified Explanation

The abstract describes a program operation for programming memory cells in a memory device and verifying the programming using different voltage levels.

  • Program operation to program target memory cells to a target programming level on a target wordline.
  • Program verify operation to apply a program verify voltage level to the target wordline to verify programming.
  • Identification of pass through read voltage level associated with the target wordline.
  • Application of pass through voltage level to first or second wordline during program verify operation, where pass through read voltage level is reduced by an offset value.

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      1. Potential Applications
  • Memory devices
  • Semiconductor industry
  • Data storage technology
      1. Problems Solved
  • Ensuring accurate programming of memory cells
  • Improving reliability of memory devices
  • Enhancing data retention capabilities
      1. Benefits
  • Increased efficiency in programming operations
  • Enhanced performance of memory devices
  • Improved data integrity and reliability


Original Abstract Submitted

A program operation is initiated to program a set of target memory cells of a target wordline of a memory device to a target programming level. During a program verify operation of the program operation, a program verify voltage level is caused to be applied to the target wordline to verify programming of the set of target memory cells. A pass through read voltage level associated with the target wordline is identified. During the program verify operation, a pass through voltage level is caused to be applied to at least one of a first wordline or a second wordline, wherein the pass through read voltage level is the read voltage level reduced by an offset value.

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