18230916. SEMICONDUCTOR DEVICE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR DEVICE
Organization Name
Inventor(s)
SEMICONDUCTOR DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18230916 titled 'SEMICONDUCTOR DEVICE
Simplified Explanation
The semiconductor device described in the patent application includes:
- Plurality of bit lines arranged on a substrate in a first horizontal direction
- Mold insulating layer with openings in a second horizontal direction
- Channel layers with vertical extension portions arranged on the bit lines
- Passivation layers on each vertical extension portion
- Gate insulating layer facing each vertical extension portion with passivation layer in between
- Word lines extending in the second horizontal direction on the gate insulating layer
Potential applications of this technology:
- Memory devices
- Microprocessors
- Integrated circuits
Problems solved by this technology:
- Improved performance of semiconductor devices
- Enhanced data storage capabilities
- Increased efficiency in data processing
Benefits of this technology:
- Higher speed and reliability in data transfer
- Reduced power consumption
- Compact design for smaller electronic devices
Original Abstract Submitted
A semiconductor device includes a plurality of bit lines arranged on a substrate and extending in a first horizontal direction, a mold insulating layer arranged on the bit lines and including a plurality of openings extending in a second horizontal direction, respectively, a plurality of channel layers respectively arranged on the bit lines and including a first vertical extension portion, in each opening of the mold insulating layer, a plurality of passivation layers respectively arranged on each vertical extension portion, a gate insulating layer arranged to face each vertical extension portion with each passivation layer therebetween, and a plurality of word lines extending in the second horizontal direction on the gate insulating layer and including first word lines respectively arranged on a first sidewall of each opening of the mold insulating layer and second word lines respectively arranged on a second sidewall of each opening of the mold insulating layer.
