18226534. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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SEMICONDUCTOR PACKAGE

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Jongwon Lee of Suwon-si (KR)

SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18226534 titled 'SEMICONDUCTOR PACKAGE

Simplified Explanation

The abstract describes a semiconductor package that includes multiple semiconductor chips stacked on top of each other and connected through redistribution structures and vertical connection conductors. The package also includes a molded portion that surrounds the chips and a second redistribution structure on the top chip. The third chip is connected to the second redistribution structure.

  • The semiconductor package includes multiple semiconductor chips stacked on top of each other.
  • The chips are connected through redistribution structures and vertical connection conductors.
  • The package includes a molded portion that surrounds the chips.
  • The top chip has a second redistribution structure.
  • The third chip is connected to the second redistribution structure.

Potential applications of this technology:

  • This semiconductor package can be used in various electronic devices such as smartphones, tablets, and laptops.
  • It can be used in high-performance computing systems and data centers.
  • The technology can be applied in automotive electronics, medical devices, and industrial equipment.

Problems solved by this technology:

  • The stacked semiconductor chips allow for increased functionality and performance in a compact form factor.
  • The redistribution structures and vertical connection conductors enable efficient interconnection between the chips.
  • The molded portion provides protection and stability to the stacked chips.

Benefits of this technology:

  • The semiconductor package offers higher integration and miniaturization, enabling smaller and more portable electronic devices.
  • The stacked chip design allows for improved performance and functionality without increasing the overall size of the package.
  • The efficient interconnection between the chips enhances signal transmission and reduces power consumption.


Original Abstract Submitted

A semiconductor package includes a first redistribution structure having a first redistribution layer; a first semiconductor chip on the first redistribution structure, and having first lower pads, first upper pads, and first through-electrodes; a second semiconductor chip on the first semiconductor chip, and having second lower pads, second upper pads, and second through-electrodes; a vertical connection conductor on the first redistribution structure, and connected to the first redistribution layer; a molded portion on the first redistribution structure, and surrounding the first second semiconductor chips; a second redistribution structure on the second semiconductor chip and the vertical connection conductor, the second redistribution structure having a second redistribution layer connected to the second upper pads and the vertical connection conductor; and a third semiconductor chip on the second redistribution structure, and having contact pads connected to the second redistribution layer.