18219394. SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
Organization Name
Inventor(s)
Hyunsoo Chung of Suwon-si (KR)
Won-Young Kim of Suwon-si (KR)
SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18219394 titled 'SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
The semiconductor package described in the patent application consists of a power delivery network, a semiconductor chip on the top surface of the power delivery network, and a second semiconductor chip horizontally spaced from the first chip on the top surface.
- The first chip has first and second surfaces opposite to each other, while the second chip has third and fourth surfaces opposite to each other.
- Chip stacks are present on both the first and second semiconductor chips.
- The first surface of the first chip is an active surface, as is the third surface of the second chip.
- The first chip stack includes third semiconductor chips on the first surface of the first chip, with their active surfaces facing the first chip.
- The first chip stack and the second semiconductor chip can be electrically connected to each other through the power delivery network.
Potential Applications: - This technology could be used in advanced electronic devices requiring efficient power delivery and multiple semiconductor chips in a compact package. - It may find applications in high-performance computing, telecommunications, and automotive electronics.
Problems Solved: - Enables the integration of multiple semiconductor chips in a single package with efficient power delivery. - Facilitates compact and high-performance electronic devices.
Benefits: - Improved performance and efficiency in electronic devices. - Compact design for space-constrained applications. - Enhanced reliability and connectivity between semiconductor chips.
Commercial Applications: Title: Advanced Semiconductor Packaging Technology for High-Performance Electronics This technology could be commercialized for use in data centers, telecommunications infrastructure, automotive electronics, and consumer electronics, enhancing the performance and efficiency of these devices.
Questions about the technology: 1. How does this semiconductor packaging technology improve the performance of electronic devices? 2. What are the potential challenges in implementing this technology in mass-produced electronic devices?
Frequently Updated Research: Researchers are continually exploring new materials and design techniques to further enhance the performance and efficiency of semiconductor packaging technologies. Stay updated on the latest advancements in this field to leverage the full potential of this technology.
Original Abstract Submitted
A semiconductor package includes a power delivery network, a semiconductor chip on a top surface of the power delivery network, and having first and second surfaces opposite to each other, a second semiconductor chip on the top surface horizontally spaced from the first semiconductor chip, the second semiconductor chip having third surface and fourth surfaces, opposite to each other, chip stacks on the first semiconductor chip, and on the second semiconductor chip. The first surface is an active surface. The third surface is an active surface of the second semiconductor chip. The first chip stack includes third semiconductor chips on the first surface of the first semiconductor chip. The third semiconductor chips is disposed such that an active surface thereof faces the first semiconductor chip, and the first chip stack and the second semiconductor chip may be electrically connected to each other through the power delivery network.
