18215351. INTEGRATED CIRCUIT (IC) PACKAGE INCLUDING A CAPACITOR FORMED IN A CONDUCTIVE ROUTING REGION simplified abstract (Microchip Technology Incorporated)
Contents
INTEGRATED CIRCUIT (IC) PACKAGE INCLUDING A CAPACITOR FORMED IN A CONDUCTIVE ROUTING REGION
Organization Name
Microchip Technology Incorporated
Inventor(s)
Matthew Martin of Gilbert AZ (US)
Julius Kovats of Manitou Springs CO (US)
INTEGRATED CIRCUIT (IC) PACKAGE INCLUDING A CAPACITOR FORMED IN A CONDUCTIVE ROUTING REGION - A simplified explanation of the abstract
This abstract first appeared for US patent application 18215351 titled 'INTEGRATED CIRCUIT (IC) PACKAGE INCLUDING A CAPACITOR FORMED IN A CONDUCTIVE ROUTING REGION
The abstract describes an integrated circuit (IC) package with a bare die mounted on a substrate, featuring a conductive routing region with a conductive routing structure and a capacitor formed in multiple conductive routing layers.
- The bare die contains IC circuitry, a dielectric region encapsulating the IC circuitry, and an IC contact exposed through the dielectric region.
- The conductive routing structure in the routing region is connected to the IC contact of the bare die.
- The capacitor in the routing region includes first and second capacitor electrodes in the conductive routing layers, with a capacitor dielectric element between them.
Potential Applications: - This technology can be used in various electronic devices requiring compact and efficient IC packages. - It can be beneficial in applications where space-saving and high-performance IC packaging are essential.
Problems Solved: - Addresses the need for compact and integrated IC packages with efficient routing and capacitor elements. - Solves challenges related to space constraints in electronic devices while maintaining high performance.
Benefits: - Improved integration and efficiency in IC packaging. - Enhanced performance and reliability in electronic devices. - Space-saving design for compact devices.
Commercial Applications: Title: Advanced IC Packaging Technology for Enhanced Performance This technology can be utilized in the semiconductor industry for manufacturing high-performance electronic devices, such as smartphones, tablets, and IoT devices. It can also find applications in automotive electronics and industrial control systems.
Questions about IC Packaging Technology: 1. How does this technology improve the efficiency of IC packaging? - This technology enhances efficiency by integrating routing structures and capacitors in multiple layers, optimizing space utilization and performance. 2. What are the key advantages of using this advanced IC packaging technology? - The main advantages include improved integration, enhanced performance, and space-saving design for electronic devices.
Original Abstract Submitted
An integrated circuit (IC) package includes a bare die mounted on a substrate, and a conductive routing region formed over the bare die, the conductive routing region including a conductive routing structure and a capacitor formed in multiple conductive routing layers. The bare die includes IC circuitry, a dielectric region at least partially encapsulating the IC circuitry, and an IC contact exposed through the dielectric region. The conductive routing structure formed in the conductive routing region is conductively connected to the IC contact of the bare die. The capacitor formed in the conductive routing region includes a first capacitor electrode and a second capacitor electrode formed in one or more of the conductive routing layers, and a capacitor dielectric element formed between the first capacitor electrode and the second capacitor electrode.
