18215115. UNLOADED CACHE BYPASS simplified abstract (MICRON TECHNOLOGY, INC.)
Contents
UNLOADED CACHE BYPASS
Organization Name
Inventor(s)
Emanuele Confalonieri of Segrate (IT)
UNLOADED CACHE BYPASS - A simplified explanation of the abstract
This abstract first appeared for US patent application 18215115 titled 'UNLOADED CACHE BYPASS
Simplified Explanation
The abstract describes a memory controller for unloaded cache bypass in computer systems. The memory controller is connected to a memory device and includes a cache. The cache has a cache sequence controller that determines the number of pending cache look-up operations and checks if it meets an unloaded bypass threshold. If the threshold is satisfied, the cache sequence controller performs a bypass memory operation, bypassing the cache and directly accessing the memory device.
- Memory controller for unloaded cache bypass in computer systems
- Connected to a memory device
- Includes a cache
- Cache sequence controller determines the number of pending cache look-up operations
- Checks if the number satisfies an unloaded bypass threshold
- Performs a bypass memory operation if the threshold is met
- Bypasses the cache and directly accesses the memory device
Potential Applications
- Computer systems with memory controllers
- Systems requiring efficient memory access
- Applications with high cache look-up operation rates
Problems Solved
- Improves memory access efficiency
- Reduces latency caused by cache look-up operations
- Optimizes performance by bypassing the cache when necessary
Benefits
- Faster memory access
- Improved system performance
- Reduced latency in cache look-up operations
Original Abstract Submitted
Systems, apparatuses, and methods related to a memory controller for unloaded cache bypass are described. An example memory controller can be coupled to a memory device. The example memory controller can include a cache. The cache can include a cache sequence controller configured to determine a quantity of a pending cache look-up operations, determine the quantity satisfies an unloaded bypass threshold, and cause performance of a bypass memory operation that bypasses the cache and accesses the memory device.
