18201089. MINIMUM MEMORY CLOCK ESTIMATION PROCEDURES simplified abstract (Micron Technology, Inc.)

MINIMUM MEMORY CLOCK ESTIMATION PROCEDURES

Organization Name

Micron Technology, Inc.

Inventor(s)

Erik V. Pohlmann of Boise ID (US)

MINIMUM MEMORY CLOCK ESTIMATION PROCEDURES - A simplified explanation of the abstract

This abstract first appeared for US patent application 18201089 titled 'MINIMUM MEMORY CLOCK ESTIMATION PROCEDURES

Simplified Explanation

The patent application describes methods, systems, and devices for estimating the minimum memory clock required for accessing memory cells. Here is a simplified explanation of the abstract:

• The device truncates a value of a first parameter associated with the duration of a clock cycle for a memory array.
• It determines a value of a second parameter that is inversely proportional to a combination of the truncated first parameter and a correction factor.
• The device then calculates the quantity of clock cycles required for accessing memory cells based on adjusting a third parameter associated with the second parameter.
• Finally, the device accesses the memory cells based on the determined quantity of clock cycles.

Potential Applications

This technology can have various applications in the field of memory systems and devices, including:

• Computer systems and servers
• Mobile devices and smartphones
• Embedded systems and IoT devices
• Gaming consoles and graphics processing units (GPUs)
• Data centers and cloud computing infrastructure

Problems Solved

The technology addresses the following problems in memory systems:

• Determining the minimum memory clock required for accessing memory cells accurately and efficiently.
• Accounting for variations and corrections in the clock cycle duration to optimize memory access.
• Ensuring reliable and timely access to memory cells for improved system performance.

Benefits

The use of this technology offers several benefits:

• Improved memory access efficiency and performance.
• Accurate estimation of the minimum memory clock required.
• Optimization of memory access based on the specific requirements of the memory array.
• Enhanced reliability and reduced latency in accessing memory cells.

Original Abstract Submitted

Methods, systems, and devices for minimum memory clock estimation procedures are described. For instance, a device, such as a host device, may truncate a value of a first parameter associated with a first duration for a clock coupled with a memory array to perform a clock cycle and may determine a value of a second parameter that is inversely proportional to a combination of the truncated first parameter and a correction factor. The device may determine a quantity of clock cycles associated with a second duration for accessing one or more memory cells of the memory array based on adjusting a third parameter associated with the second parameter. The device may access the one or more memory cells of the memory array based on the determined quantity of clock cycles.