18187706. BACKSIDE CONTACT FORMATION simplified abstract (INTERNATIONAL BUSINESS MACHINES CORPORATION)

BACKSIDE CONTACT FORMATION

Organization Name

INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor(s)

Ruilong Xie of Niskayuna NY (US)

Shogo Mochizuki of Mechanicville NY (US)

Kisik Choi of Watervliet NY (US)

HUIMEI Zhou of Albany NY (US)

Tenko Yamashita of Schenectady NY (US)

BACKSIDE CONTACT FORMATION - A simplified explanation of the abstract

This abstract first appeared for US patent application 18187706 titled 'BACKSIDE CONTACT FORMATION

The abstract describes a patent application related to the formation of an upper portion and a lower portion of a source/drain epitaxy in a nanosheet stack structure on a substrate, with the lower portion having a greater width than the upper portion. Additionally, there are dielectric layers below the nanosheet stack and an encapsulation liner between the dielectric fill layer and the lower portion of the source/drain epitaxy.

• Upper portion and lower portion of source/drain epitaxy formed in a nanosheet stack structure.
• Lower portion has a greater width than the upper portion.
• Dielectric layers present below the nanosheet stack.
• Encapsulation liner between the dielectric fill layer and the lower portion of the source/drain epitaxy.

Potential Applications: - Advanced semiconductor devices - Nanotechnology - Integrated circuits

Problems Solved: - Enhancing the performance of semiconductor devices - Improving the efficiency of integrated circuits

Benefits: - Increased speed and efficiency of electronic devices - Enhanced overall performance of semiconductor technology

Commercial Applications: Title: "Innovative Source/Drain Epitaxy for Advanced Semiconductor Devices" This technology can be applied in the development of faster and more efficient electronic devices, leading to potential market advantages in the semiconductor industry.

Questions about the technology: 1. How does the formation of the upper and lower portions of the source/drain epitaxy impact the performance of semiconductor devices? 2. What are the potential challenges in implementing this technology on a large scale in the semiconductor industry?

Original Abstract Submitted

An upper portion of a source/drain epitaxy adjacent to channel layers of a nanosheet stack on a substrate, a lower portion of the source/drain epitaxy below the upper portion of the source/drain epitaxy, a second width of the lower portion of the source/drain epitaxy is greater than a first width of the upper portion of the source/drain epitaxy, a dielectric fill layer below the nanosheet stack, and a dielectric encapsulation liner between the dielectric fill layer and the lower portion of the source/drain epitaxy. Forming an upper portion of a source/drain epitaxy adjacent to semiconductor channel layers of a nanosheet stack, and forming a lower portion of the source/drain epitaxy below the upper portion of the source/drain epitaxy, a second width of the lower portion of the source/drain epitaxy is greater than a first width of the upper portion of the source/drain epitaxy.