18181148. SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME simplified abstract (Kioxia Corporation)
Contents
- 1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
Organization Name
Inventor(s)
Yoshiki Nagashima of Tokyo (JP)
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18181148 titled 'SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
Simplified Explanation
The semiconductor memory device described in the patent application consists of two memory dies stacked on top of each other, connected by wiring and switch elements that allow for independent control.
- The first memory die is connected to a power supply voltage via a first wiring and switch element.
- The second memory die is connected to the same power supply voltage via a second wiring and switch element.
- The first and second switch elements are independently controllable, allowing for separate operation of each memory die.
Potential Applications
This technology could be applied in various electronic devices requiring high-speed and efficient memory storage, such as smartphones, tablets, and computers.
Problems Solved
This innovation solves the problem of maximizing memory storage capacity in a compact space while maintaining efficient power supply to each memory die.
Benefits
The benefits of this technology include increased memory capacity, improved data processing speed, and optimized power efficiency in semiconductor memory devices.
Potential Commercial Applications
- "Enhancing Memory Performance in Electronic Devices with Stacked Memory Dies"
Possible Prior Art
There may be prior art related to stacked memory dies in semiconductor devices, but specific examples are not provided in the patent application.
Unanswered Questions
== How does this technology impact the overall performance of electronic devices utilizing semiconductor memory? This article does not delve into the specific performance improvements or limitations that may result from implementing this technology.
== Are there any potential challenges or drawbacks associated with the use of stacked memory dies in semiconductor devices? The article does not address any potential challenges or drawbacks that may arise from the implementation of this technology.
Original Abstract Submitted
A semiconductor memory device includes a first memory die, a second memory die disposed above the first memory die via adhesives, a first wiring connected to the first memory die, and configured to apply a power supply voltage to the first memory die, a first switch element connected to the first wiring, a second wiring connected to the second memory die, and configured to apply the power supply voltage to the second memory die, a second switch element connected to the second wiring, and a third wiring configured to electrically connect to the first wiring via the first switch element, and configured to electrically connect to the second wiring via the second switch element. The first switch element and the second switch element are independently controllable.
