18180188. SEMICONDUCTOR DEVICE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
SEMICONDUCTOR DEVICE
Organization Name
Inventor(s)
Hyunsoo Chung of Suwon-si (KR)
Young Lyong Kim of Suwon-si (KR)
SEMICONDUCTOR DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18180188 titled 'SEMICONDUCTOR DEVICE
Simplified Explanation
The semiconductor device described in the patent application consists of a peripheral circuit structure and a cell array structure. The peripheral circuit structure includes peripheral circuits on a substrate and first bonding pads that are electrically connected to the peripheral circuits. The cell array structure includes memory cells on a semiconductor layer and second bonding pads that are electrically connected to the memory cells and bonded to the first bonding pads. The cell array structure also includes a stacked structure with insulating layers and electrodes, an external connection pad on the surface of the semiconductor layer, a dummy pattern at the same level as the semiconductor layer, and a photosensitive insulating layer on the semiconductor layer and the dummy pattern. The photosensitive insulating layer has different thicknesses in different areas.
- The patent application describes a semiconductor device that combines peripheral circuits and memory cells.
- The device includes bonding pads that facilitate electrical connections between the peripheral circuits and memory cells.
- The cell array structure has a stacked structure with insulating layers and electrodes, providing a compact design.
- The external connection pad on the surface of the semiconductor layer allows for easy external connections.
- The dummy pattern at the same level as the semiconductor layer helps in the manufacturing process.
- The photosensitive insulating layer has different thicknesses, providing insulation and protection to different areas of the device.
Potential applications of this technology:
- Memory devices: The semiconductor device described in the patent application can be used in memory devices, such as RAM or flash memory.
- Integrated circuits: The combination of peripheral circuits and memory cells in a single device can be useful in various integrated circuit applications.
Problems solved by this technology:
- Compact design: The stacked structure of the cell array allows for a more compact design, saving space in electronic devices.
- Efficient manufacturing: The presence of the dummy pattern at the same level as the semiconductor layer helps in the manufacturing process, improving efficiency.
- Insulation and protection: The photosensitive insulating layer with different thicknesses provides insulation and protection to different areas of the device, reducing the risk of damage.
Benefits of this technology:
- Improved performance: The combination of peripheral circuits and memory cells in a single device can lead to improved performance in electronic devices.
- Space-saving: The compact design of the semiconductor device saves space in electronic devices, allowing for more components or a smaller form factor.
- Enhanced manufacturing efficiency: The presence of the dummy pattern and the optimized thickness of the photosensitive insulating layer contribute to improved manufacturing efficiency.
Original Abstract Submitted
A semiconductor device includes a peripheral circuit structure including peripheral circuits on a substrate and first bonding pads electrically connected to the peripheral circuits and a cell array structure including memory cells on a semiconductor layer and second bonding pads electrically connected to the memory cells and bonded to the first bonding pads. The cell array structure includes a stacked structure including insulating layers and electrodes, an external connection pad on a surface of the semiconductor layer, a dummy pattern at a same level as the semiconductor layer relative to the substrate, and a photosensitive insulating layer on the semiconductor layer and the dummy pattern. A first thickness of a portion of the photosensitive insulating layer vertically overlapping the external connection pad is greater than a second thickness of another portion of the photosensitive insulating layer vertically overlapping the dummy pattern.