18178665. METHOD OF SELF-ALIGNED DIELECTRIC WALL FORMATION FOR FORKSHEET APPLICATION simplified abstract (Tokyo Electron Limited)

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METHOD OF SELF-ALIGNED DIELECTRIC WALL FORMATION FOR FORKSHEET APPLICATION

Organization Name

Tokyo Electron Limited

Inventor(s)

Eric Chih-Fang Liu of Albany NY (US)

Subhadeep Kal of Albany NY (US)

Kai-Hung Yu of Albany NY (US)

Shihsheng Chang of Albany NY (US)

METHOD OF SELF-ALIGNED DIELECTRIC WALL FORMATION FOR FORKSHEET APPLICATION - A simplified explanation of the abstract

This abstract first appeared for US patent application 18178665 titled 'METHOD OF SELF-ALIGNED DIELECTRIC WALL FORMATION FOR FORKSHEET APPLICATION

The present disclosure describes a method for fabricating a forksheet semiconductor structure, involving various steps such as forming a multi-layer stack on a substrate, creating a mandrel structure, and etching the stack to define an insulation wall trench.

  • Formation of a multi-layer stack with alternating semiconductor layers.
  • Creation of a mandrel structure from the multi-layer stack and a cap layer.
  • Surrounding the mandrel structure with fill material.
  • Partially recessing the cap layer to expose inner sidewalls of the fill material.
  • Forming sidewall spacers on the inner sidewalls.
  • Etching the multi-layer stack to define an insulation wall trench using the spacers as a mask.
  • Filling the trench with insulation material to create an insulation wall separating the multi-layer stack.

Potential Applications: - Semiconductor manufacturing - Integrated circuit fabrication - Electronic device production

Problems Solved: - Improved insulation between semiconductor layers - Enhanced structural integrity of semiconductor devices

Benefits: - Increased efficiency in semiconductor fabrication - Enhanced performance of electronic devices - Greater reliability of integrated circuits

Commercial Applications: Title: Semiconductor Manufacturing Innovations This technology can be utilized in the production of various electronic devices, leading to improved performance and reliability in the semiconductor industry. The innovation offers a more efficient and effective method for fabricating semiconductor structures, which can have significant implications for the market.

Questions about Forksheet Semiconductor Structure: 1. How does the method of forming sidewall spacers contribute to the fabrication process?

  The formation of sidewall spacers helps define the insulation wall trench during etching, ensuring precise separation of the multi-layer stack.

2. What are the potential advantages of using a forksheet semiconductor structure in electronic devices?

  A forksheet semiconductor structure can enhance insulation and structural integrity, leading to improved performance and reliability in electronic devices.


Original Abstract Submitted

Aspects of the present disclosure provide a method for fabricating a forksheet semiconductor structure. For example, the method can include forming on a substrate a multi-layer stack including first and second semiconductor layers stacked over one another alternately, forming a cap layer over the multi-layer stack, forming a mandrel structure from the multi-layer stack and the cap layer, forming a fill material that surrounds the mandrel structure and has a top surface level with a top of the mandrel structure, partially recessing the cap layer to uncover opposite inner sidewalls of the fill material, forming sidewall spacers on the opposite inner sidewalls, directionally etching the multi-layer stack to define an insulation wall trench using the sidewall spacers as an etch mask, and forming an insulation material within the insulation wall trench to form an insulation wall that separates the multi-layer stack into insulated first and second multi-layer stacks.