18176455. MEMORY SYSTEM AND CONTROL METHOD simplified abstract (Kioxia Corporation)

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MEMORY SYSTEM AND CONTROL METHOD

Organization Name

Kioxia Corporation

Inventor(s)

Mitsunori Tadokoro of Fujisawa Kanagawa (JP)

MEMORY SYSTEM AND CONTROL METHOD - A simplified explanation of the abstract

This abstract first appeared for US patent application 18176455 titled 'MEMORY SYSTEM AND CONTROL METHOD

Simplified Explanation

The patent application describes a controller that manages logical areas of a logical address space and divides memory regions for storing address translation tables into buffer regions.

  • The controller assigns one logical area as the first logical area for each namespace, including the last logical address of the namespace, and assigns one or more logical areas as second logical areas.
  • It divides the memory region storing address translation tables into buffer regions, assigning one buffer region for each second logical area to store map segments corresponding to that area.
  • Additionally, the controller assigns one buffer region for map segments corresponding to the first logical areas of two or more namespaces, managing second pointers indicating storage locations in the buffer region for these map segments.

Potential Applications

This technology could be applied in:

  • Virtual memory management systems
  • Operating systems
  • Memory allocation algorithms

Problems Solved

This technology addresses:

  • Efficient memory management
  • Address translation table organization
  • Namespace segmentation

Benefits

The benefits of this technology include:

  • Improved memory access efficiency
  • Simplified logical address space management
  • Enhanced system performance

Potential Commercial Applications

Potential commercial applications of this technology could be in:

  • Cloud computing services
  • Data centers
  • Embedded systems

Possible Prior Art

One possible prior art for this technology could be:

  • Memory management techniques in virtualization software

Unanswered Questions

How does this technology impact system security?

This article does not delve into the potential security implications of the described controller. Further research is needed to understand how this technology may affect system security measures.

What are the scalability limitations of this controller?

The scalability of the controller in handling a large number of namespaces and logical areas is not discussed in this article. Future studies could explore the limitations of this technology in terms of scalability.


Original Abstract Submitted

A controller assigns, for each namespace, one logical area of a logical address space as a first logical area including a last logical address of the namespace and assigns one or more of logical areas as second logical areas. The controller divides a memory region in which an address translation table is stored into buffer regions. For each second logical area, the controller assigns one buffer region for storing map segments corresponding to the second logical area, and manages a first pointer indicating a storage location of the buffer region assigned thereto. The controller also assigns one buffer region for map segments corresponding to the first logical areas of two or more namespaces, and manages second pointers respectively indicating storage locations in the one buffer region, in which the map segments corresponding to the first logical areas of the two or more namespaces are respectively stored.