18176452. MEMORY SYSTEM simplified abstract (Kioxia Corporation)

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MEMORY SYSTEM

Organization Name

Kioxia Corporation

Inventor(s)

Tomoyuki Kantani of Yokohama Kanagawa (JP)

Kousuke Fujita of Yokohama Kanagawa (JP)

Iku Endo of Odawara Kanagawa (JP)

MEMORY SYSTEM - A simplified explanation of the abstract

This abstract first appeared for US patent application 18176452 titled 'MEMORY SYSTEM

Simplified Explanation

The memory system described in the patent application involves a memory controller that can write data in different modes to different blocks of a non-volatile memory, allowing for efficient data management and processing.

  • The memory controller writes data in a first mode to a first block of a first area of the non-volatile memory, with a specific number of bits per memory cell.
  • Copy processing is then executed on the data in the first block, where system data is written to a second block in the first area in the first mode, and user data is written to a third block in a second area of the memory in a second mode with a larger number of bits per memory cell.

Potential Applications

This technology could be applied in:

  • Data storage systems
  • Embedded systems
  • Mobile devices

Problems Solved

This technology addresses:

  • Efficient data management
  • Enhanced data processing capabilities
  • Improved memory utilization

Benefits

The benefits of this technology include:

  • Increased data transfer speeds
  • Enhanced data security
  • Optimized memory usage

Potential Commercial Applications

A potential commercial application of this technology could be in:

  • Solid-state drives (SSDs)
  • Mobile phones
  • IoT devices

Possible Prior Art

One possible prior art for this technology could be:

  • Memory controllers with advanced data processing capabilities

What are the potential limitations of this memory system in terms of scalability and compatibility with different types of non-volatile memories?

The memory system described in the patent application may face limitations in terms of scalability and compatibility with various types of non-volatile memories. Different memory architectures and technologies may require specific adaptations or modifications to implement the described data processing techniques effectively.

How does the memory controller handle potential errors or data corruption during the copy processing operations described in the patent application?

The memory controller's error correction mechanisms and data integrity checks play a crucial role in ensuring the reliability of the copy processing operations. By detecting and correcting errors promptly, the memory system can maintain the integrity of the copied data and prevent potential data corruption issues.


Original Abstract Submitted

A memory system includes a memory controller configured to write data in a first mode to a first block of a first area of a non-volatile memory. The first mode is a write mode for writing data with a first number of bits per memory cell. The memory controller is further configured to execute copy processing on the data written in the first mode to the first block, by writing system data written in the first block to a second block of the first area in the first mode and writing user data written in the first block to a third block of a second area of the non-volatile memory in the second mode. The second mode is a write mode for writing data with a second number of bits larger than the first number of bits per memory cell.