18173033. SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)
Contents
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Chih-Chien Pan of Taipei City (TW)
Yu-Wei Lin of New Taipei City (TW)
Li-Hui Cheng of New Taipei City (TW)
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract
This abstract first appeared for US patent application 18173033 titled 'SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
Simplified Explanation:
This patent application describes a semiconductor package with multiple semiconductor elements connected to a substrate, along with various layers to enhance heat transfer and conductivity.
Key Features and Innovation:
- Semiconductor package with multiple elements connected to a substrate
- Layers for heat transfer enhancement, thermal conductivity, and adhesion
- Lid for protection and joining the layers
Potential Applications:
This technology can be used in various electronic devices where efficient heat dissipation is crucial, such as in computers, smartphones, and automotive electronics.
Problems Solved:
This technology addresses the challenge of managing heat dissipation in densely packed semiconductor devices, ensuring optimal performance and longevity.
Benefits:
The benefits of this technology include improved thermal management, enhanced device performance, and increased reliability.
Commercial Applications:
Potential commercial applications include consumer electronics, industrial equipment, and automotive electronics, where efficient heat dissipation is essential for optimal performance.
Questions about Semiconductor Package Technology: 1. How does this semiconductor package technology compare to traditional heat dissipation methods? 2. What are the specific advantages of using multiple semiconductor elements in this package design?
Original Abstract Submitted
A semiconductor package and a manufacturing method thereof are provided. The package includes a substrate, and first, second and third semiconductor elements disposed on and electrically connected to the substrate. A heat transfer enhancing layer, a thermal conductive material layer and an adhesive material layer are respectively disposed on and joined to the first, second and third semiconductor elements. A lid is disposed over the first, second and third semiconductor elements, and joined to the heat transfer enhancing layer, the thermal conductive material layer and the adhesive material layer. The thermal conductive material layer has a thermal conductivity lower than that of the heat transfer enhancing layer and higher than that of the adhesive material layer, and the thermal conductive material layer has a bonding strength larger than that of the heat transfer enhancing layer and smaller than that of the adhesive material layer.
