18173027. PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)
Contents
PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Chen-Hsuan Tsai of Taitung City (TW)
Chin-Chuan Chang of Hsinchu County (TW)
Ying-Ching Shih of Hsinchu City (TW)
PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract
This abstract first appeared for US patent application 18173027 titled 'PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
The patent application describes a package structure consisting of a first redistribution circuit structure, a first semiconductor die, and a second semiconductor die.
- The first redistribution circuit structure has two sides, with the first semiconductor die placed over one side and the second semiconductor die placed over the other side, electrically connected to it.
- The second semiconductor die includes a substrate, an interconnect structure, conductive terminals, and a dielectric layer covering the terminals, with a different material than the dielectric layer in the first redistribution circuit structure.
Key Features and Innovation:
- Integration of two semiconductor dies with different dielectric materials in a package structure.
- Efficient electrical connection between the semiconductor dies through the redistribution circuit structure.
Potential Applications:
- Advanced semiconductor packaging in electronic devices.
- High-density integrated circuits in microelectronics.
Problems Solved:
- Enhancing electrical connectivity between semiconductor dies.
- Improving the performance and reliability of package structures.
Benefits:
- Increased functionality and performance of electronic devices.
- Enhanced durability and longevity of package structures.
Commercial Applications:
- Semiconductor industry for manufacturing advanced electronic devices.
- Consumer electronics for improved performance and reliability.
Questions about the technology: 1. How does the use of different dielectric materials in the package structure impact the overall performance of the semiconductor dies? 2. What are the potential challenges in manufacturing package structures with integrated semiconductor dies of varying materials?
Original Abstract Submitted
A package structure includes a first redistribution circuit structure, a first semiconductor die, and a second semiconductor die. The first redistribution circuit structure has a first side and a second side opposite to the first side. The first semiconductor die is disposed over the firs side of the first redistribution circuit structure. The second semiconductor die is disposed over the second side of the first redistribution circuit structure and is electrically connected thereto, where the second semiconductor die includes a substrate, an interconnect structure disposed on the substrate, a plurality of conductive terminals disposed on and electrically connected to the interconnect structure, and a dielectric layer disposed on the interconnect structure and laterally covering the plurality of conductive terminals. A material of the dielectric layer included in the second semiconductor die is different from a material of a dielectric layer included in the first redistribution circuit structure.
