18169177. PACKAGE, PACKAGE STRUCTURE AND METHOD OF MANUFACTURING PACKAGE STRUCTURE simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

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PACKAGE, PACKAGE STRUCTURE AND METHOD OF MANUFACTURING PACKAGE STRUCTURE

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Che-Yu Yeh of New Taipei City (TW)

Chien-Chia Chiu of Taoyan City (TW)

Hua-Wei Tseng of New Taipei City (TW)

Wan-Yu Lee of Taipei City (TW)

PACKAGE, PACKAGE STRUCTURE AND METHOD OF MANUFACTURING PACKAGE STRUCTURE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18169177 titled 'PACKAGE, PACKAGE STRUCTURE AND METHOD OF MANUFACTURING PACKAGE STRUCTURE

Simplified Explanation

The patent application describes a package structure that includes a die, through vias, dummy structures, an encapsulant, and a redistribution structure. The through vias surround the die, while the dummy structures are placed between the die and the through vias, adjacent to at least one corner of the die. The encapsulant covers the die, through vias, and dummy structures, while the redistribution structure is connected to the die and through vias.

  • Package structure with die, through vias, dummy structures, encapsulant, and redistribution structure
  • Through vias surrounding the die
  • Dummy structures placed between the die and through vias, adjacent to die corners
  • Encapsulant covering the die, through vias, and dummy structures
  • Redistribution structure electrically connected to the die and through vias

Potential Applications

The technology described in the patent application could be applied in the following areas:

  • Semiconductor packaging
  • Integrated circuits
  • Electronic devices

Problems Solved

The package structure addresses the following issues:

  • Ensuring proper electrical connections in semiconductor devices
  • Enhancing the reliability and performance of integrated circuits
  • Protecting the die and through vias from external elements

Benefits

The package structure offers the following benefits:

  • Improved electrical connectivity
  • Enhanced reliability of semiconductor devices
  • Increased performance of integrated circuits

Potential Commercial Applications

The technology could find commercial applications in:

  • Consumer electronics
  • Automotive electronics
  • Telecommunications industry

Possible Prior Art

One possible prior art could be the use of dummy structures in semiconductor packaging to improve electrical connections and reliability. Another could be the integration of through vias in package structures to enhance performance and functionality.

Unanswered Questions

How does the package structure impact the overall size of the electronic device?

The article does not provide information on whether the package structure affects the size of the electronic device it is used in. This could be important for manufacturers looking to optimize space in their products.

What materials are used in the encapsulant and redistribution structure?

The patent application does not specify the materials used in the encapsulant and redistribution structure. Understanding the materials could provide insights into the durability and performance of the package structure.


Original Abstract Submitted

Disclosed are a package, a package structure and a method of manufacturing a package structure. In one embodiment, the package includes a die, a plurality of through vias, at least one dummy structure, an encapsulant and a redistribution structure. The plurality of through vias surround the die. The at least one dummy structure is disposed between the die and the plurality of through vias and adjacent to at least one corner of the die. The encapsulant encapsulates the die, the plurality of through vias and the at least one dummy structure. The redistribution structure is disposed on the die, the plurality of through vias, the at least one dummy structure and the encapsulant and electrically connected to the die and the plurality of through vias.