18168972. Multi-Modal Systolic Array For Matrix Multiplication simplified abstract (Google LLC)

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Multi-Modal Systolic Array For Matrix Multiplication

Organization Name

Google LLC

Inventor(s)

Matthew Leever Hedlund of Sun Prairie WI (US)

Christopher Aaron Clark of Madison WI (US)

Andrew Everett Phelps of Middleton WI (US)

Thomas James Norrie of San Jose CA (US)

Norman Paul Jouppi of Palo Alto CA (US)

Sushma Honnavara-prasad of Los Gatos CA (US)

Vinayak Anand Gokhale of Austin TX (US)

Pareesa Ameneh Golnari of Bellevue WA (US)

Multi-Modal Systolic Array For Matrix Multiplication - A simplified explanation of the abstract

This abstract first appeared for US patent application 18168972 titled 'Multi-Modal Systolic Array For Matrix Multiplication

Simplified Explanation:

The patent application describes a system and method for matrix multiplication using a configurable systolic array. The systolic processor can operate in different modes based on the data type indicator received.

Key Features and Innovation:

  • Systolic array configurable between multiple modes of operation
  • Different modes for different data types
  • Efficient matrix multiplication process

Potential Applications: This technology can be applied in various fields such as:

  • Signal processing
  • Image processing
  • Machine learning algorithms

Problems Solved: The technology addresses the following issues:

  • Efficient matrix multiplication
  • Configurability for different data types
  • Streamlined data processing

Benefits: The benefits of this technology include:

  • Faster matrix multiplication
  • Improved performance in data processing
  • Flexibility in handling different data types

Commercial Applications: Title: Advanced Matrix Multiplication System for Data Processing Applications This technology can be commercially used in:

  • High-performance computing systems
  • Data centers
  • Scientific research facilities

Prior Art: Readers can explore prior art related to systolic arrays, matrix multiplication algorithms, and configurable processing systems.

Frequently Updated Research: Stay updated on research related to systolic arrays, matrix multiplication optimization, and data processing efficiency.

'Questions about Matrix Multiplication Technology: 1. How does the configurable systolic array improve matrix multiplication efficiency? 2. What are the different modes of operation for the systolic processor in this technology?


Original Abstract Submitted

A system and method for matrix multiplication using a systolic array configurable between multiple modes of operation. A systolic processor may receive a data type indicator for the matrix multiplication. For a first data type, the systolic processor may load the right-hand side data from the right-hand matrix register into the data processing cells of the systolic array between row 0 and row M−1, and pass the respective row of the left-hand side data through a corresponding row of the systolic array between rows 0 and M−1. For a second data type, the systolic processor may split each element of the left-hand side data and the right-hand side data into respective first and second element halves, and move each element half through a corresponding row of the systolic array between rows 0 and 2M−1.