18155499. INTERRUPT MANAGEMENT ON A ONE-WIRE BIDIRECTIONAL BUS simplified abstract (QUALCOMM Incorporated)

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INTERRUPT MANAGEMENT ON A ONE-WIRE BIDIRECTIONAL BUS

Organization Name

QUALCOMM Incorporated

Inventor(s)

Lalan Jee Mishra of Escondido CA (US)

Umesh Srikantiah of San Diego CA (US)

Francesco Gatta of San Diego CA (US)

Richard Dominic Wietfeldt of San Diego CA (US)

INTERRUPT MANAGEMENT ON A ONE-WIRE BIDIRECTIONAL BUS - A simplified explanation of the abstract

This abstract first appeared for US patent application 18155499 titled 'INTERRUPT MANAGEMENT ON A ONE-WIRE BIDIRECTIONAL BUS

Simplified Explanation: The data communication apparatus described in the patent application includes a line driver that connects the apparatus to a 1-wire serial bus. The controller in the apparatus is responsible for transmitting synchronization pulses over the bus to synchronize receiving devices, initiating interrupt handling procedures, and starting read or write transactions with other devices on the bus.

Key Features and Innovation:

  • Line driver for connecting to a 1-wire serial bus
  • Controller for transmitting synchronization pulses and initiating transactions
  • Synchronization of receiving devices with untransmitted clock signal
  • Interrupt handling procedure initiation based on pulse encoding

Potential Applications: This technology can be used in various data communication systems that require synchronization and efficient transaction handling over a 1-wire serial bus.

Problems Solved: This technology addresses the need for precise synchronization of receiving devices and efficient transaction initiation in data communication systems.

Benefits:

  • Improved synchronization of receiving devices
  • Efficient transaction handling
  • Enhanced data communication reliability

Commercial Applications: The technology can be applied in industries utilizing data communication systems, such as IoT devices, industrial automation, and sensor networks, to enhance communication efficiency and reliability.

Prior Art: Readers interested in prior art related to this technology can explore patents and research papers on data communication systems, synchronization methods, and transaction handling over serial buses.

Frequently Updated Research: Researchers in the field of data communication systems may find relevant studies on synchronization techniques, transaction protocols, and bus communication optimizations.

Questions about Data Communication Apparatus: 1. What are the key components of the data communication apparatus described in the patent application? 2. How does the controller in the apparatus handle synchronization and transaction initiation over the 1-wire serial bus?


Original Abstract Submitted

A data communication apparatus comprises a line driver configured to couple the data communication apparatus to a 1-wire serial bus; and a controller configured to: transmit a plurality of synchronization pulses over the 1-wire serial bus after a sequence start condition (SSC) has been transmitted over the 1-wire serial bus, the plurality of synchronization pulses being configured to synchronize one or more receiving devices coupled to the 1-wire serial bus to an untransmitted transmit clock signal; initiate an interrupt handling procedure when the plurality of synchronization pulses is encoded with a first value; and initiate a read transaction or a write transaction with at least one of the one or more receiving devices coupled to the 1-wire serial bus when the plurality of synchronization pulses is encoded with a second value.