18152257. Non-Transparent Bridge Selection simplified abstract (Dell Products, L.P.)
Contents
Non-Transparent Bridge Selection
Organization Name
Inventor(s)
Jonathan Krasner of Coventry RI (US)
Ro Monserrat of Medfield MA (US)
Jerome Cartmell of Millis MA (US)
Thomas Mackintosh of Boston MA (US)
Non-Transparent Bridge Selection - A simplified explanation of the abstract
This abstract first appeared for US patent application 18152257 titled 'Non-Transparent Bridge Selection
The abstract describes a storage engine with two compute nodes, each having its own PCIe root complex and attached memory. The nodes are interconnected by Non-Transparent Bridge (NTB) links, with unequal sharing of resources. Host IO devices use a subset of NTB links for memory access operations on the peer node's memory, while storage software can use all NTB links. An NTB link arbitration system distributes storage software memory access operations on peer memory across subsets of NTB links.
- The storage engine has two compute nodes with separate PCIe root complexes and attached memory.
- The compute nodes are connected by NTB links, with unequal sharing of resources.
- Host IO devices use a subset of NTB links for memory access operations on the peer node's memory.
- Storage software can use all NTB links for memory access operations.
- An NTB link arbitration system distributes storage software memory access operations on peer memory across subsets of NTB links.
Potential Applications: - High-performance computing - Data storage systems - Cloud computing infrastructure
Problems Solved: - Efficient memory access in a storage engine with multiple compute nodes - Resource allocation for memory access operations - Improved performance in storage software operations
Benefits: - Enhanced memory access efficiency - Optimal resource utilization - Improved overall performance of the storage engine
Commercial Applications: Title: "Optimized Memory Access in Storage Engines for High-Performance Computing" This technology can be used in data centers, cloud computing environments, and high-performance computing systems to improve memory access efficiency and overall performance.
Prior Art: Further research can be conducted in the field of storage engines, NTB link arbitration systems, and resource allocation in compute nodes to explore prior art related to this technology.
Frequently Updated Research: Stay updated on advancements in NTB link technology, memory access optimization, and resource allocation in storage engines to enhance the performance of high-performance computing systems.
Questions about Optimized Memory Access in Storage Engines for High-Performance Computing:
1. How does the unequal sharing of NTB resources impact memory access operations in the storage engine? 2. What are the potential challenges in implementing an NTB link arbitration system for storage software memory access operations?
Original Abstract Submitted
A storage engine has a pair of compute nodes, each compute node having a separate PCIe root complex and attached memory. The PCIe root complexes are interconnected by multiple Non-Transparent Bridge (NTB) links. The NTB resources are unequally shared, such that host IO devices are required to use a first subset of the NTB links to implement memory access operations on the memory of the peer compute node, whereas storage software memory access operations are able to be implemented on all of the NTB links. A NTB link arbitration system arbitrates usage of the first and second subsets of NTB links by the storage software, to distribute subsets of the storage software memory access operations on peer memory to the first and second subsets of NTB links, while causing all host IO device memory access operations on peer memory to be implemented on the first set of NTB links.
