18151643. INTEGRATED CIRCUIT PACKAGES AND METHODS simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

INTEGRATED CIRCUIT PACKAGES AND METHODS

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Jen-Chun Liao of Taipei City (TW)

Yen-Hung Chen of Hsinchu (TW)

Ching-Hua Hsieh of Hsinchu (TW)

Sung-Yueh Wu of Hsinchu (TW)

Chih-Wei Lin of Zhubei City (TW)

Kung-Chen Yeh of Taichung City (TW)

INTEGRATED CIRCUIT PACKAGES AND METHODS - A simplified explanation of the abstract

This abstract first appeared for US patent application 18151643 titled 'INTEGRATED CIRCUIT PACKAGES AND METHODS

The abstract describes an integrated circuit package with multiple integrated circuit dies and a method of forming them.

• The package includes a first integrated circuit die and a second integrated circuit die bonded together.
• The first die has a substrate, interconnect structure, and bonding layer.
• The second die also has a substrate, interconnect structure, and bonding layer.
• The first bonding layer is in direct contact with the second bonding layer at an acute angle.
• The method involves bonding the dies together to create a compact integrated circuit package.

Potential Applications: - This technology can be used in the manufacturing of advanced electronic devices such as smartphones, tablets, and computers. - It can also be applied in the automotive industry for advanced driver assistance systems and in aerospace for avionics.

Problems Solved: - This technology allows for the integration of multiple integrated circuit dies in a compact package, saving space and improving efficiency. - By bonding the dies together, it reduces the overall footprint of the integrated circuit package.

Benefits: - Improved performance and efficiency in electronic devices. - Space-saving design for compact and portable devices. - Enhanced reliability and durability of integrated circuits.

Commercial Applications: - The technology can be utilized by semiconductor companies for the development of next-generation integrated circuits. - It can also benefit consumer electronics manufacturers looking to create smaller and more powerful devices.

Prior Art: - Researchers and engineers in the field of semiconductor packaging and integrated circuit design may find relevant prior art in academic journals, patent databases, and industry publications.

Frequently Updated Research: - Ongoing research in semiconductor packaging techniques and materials may provide further advancements in the field of integrated circuit packaging.

Questions about Integrated Circuit Package Technology: 1. How does the integration of multiple dies in a single package improve the performance of electronic devices? 2. What are the key challenges in bonding different integrated circuit dies together, and how are they overcome in this technology?

Original Abstract Submitted

An integrated circuit package including integrated circuit dies and a method of forming are provided. The integrated circuit package may include a first integrated circuit die and a second integrated circuit die bonded to the first integrated circuit die. The first integrated circuit die may include a first substrate, a first interconnect structure, and a first bonding layer. The first interconnect structure may be between the first bonding layer and the first substrate. The second integrated circuit die may include a second substrate, a second interconnect structure, and a second bonding layer. The second interconnect structure may be between the second bonding layer and the second substrate. A first surface of the first bonding layer may be in direct contact with a first surface of the second bonding layer. A sidewall the first bonding layer and the first surface of the second bonding layer may form a first acute angle.